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68HC705SB7 参数 Datasheet PDF下载

68HC705SB7图片预览
型号: 68HC705SB7
PDF下载: 下载PDF文件 查看货源
内容描述: 规格(通用版) [SPECIFICATION (General Release)]
分类和应用:
文件页数/大小: 170 页 / 1982 K
品牌: FREESCALE [ Freescale ]
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GENERAL RELEASE SPECIFICATION  
August 27, 1998  
A reset therefore disables the SM-Bus and leaves the shared port A pins as gen-  
eral I/O. Any pending interrupt flag is cleared and the SM-Bus interrupt is dis-  
abled. Also the clock rate defaults to the fastest rate.  
5.4.7 Analog Subsystem  
A reset has the following effects on the analog subsystem:  
Clears all the bits in the multiplex registers (AMUX1, AMUX2) bits except  
the hold switch bit (HOLD) which is set.  
Clears all the bits in the analog control register (ACR).  
Clears all the bits in the analog status register (ASR).  
A reset therefore connects the negative input of comparator to the channel selec-  
tion bus, which is switched to V . The comparator is set up as non-inverting (a  
SS  
higher positive voltage on the positive input results in a positive output) and both  
are powered down. The current source and discharge device on the CAP pin is  
also disabled and powered down. Any analog subsystem interrupt flags are  
cleared and the interrupts are disabled.  
MOTOROLA  
5-6  
RESETS  
MC68HC05SB7  
REV 2.1  
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