GENERAL RELEASE SPECIFICATION
August 27, 1998
STOP
WAIT
CLEAR I BIT IN CCR.
SET IRQE BIT IN ISCR.
TURN OFF CPU CLOCK.
KEEP OTHER MODULE
CLOCKS ACTIVE.
CLEAR I BIT IN CCR.
SET IRQE BIT IN ISCR.
CLEAR CTOF, RTIF, CTOFE, AND RTIE BITS IN TSCR.
CLEAR ICF, OCF AND TOF BITS IN TSR.
CLEAR ICIE, OCIE and TOIE BITS IN TCR.
DISABLE OSCILLATOR
YES
EXTERNAL
RESET?
NO
YES
YES
YES
YES
YES
YES
EXTERNAL
EXTERNAL
INTERRUPT?
RESET?
NO
NO
CORE
TIMER
INTERRUPT?
YES
EXTERNAL
INTERRUPT?
NO
NO
PROG.
TIMER
INTERRUPT?
TURN ON OSCILLATOR.
RESET STABILIZATION DELAY TIMER.
NO
SM-BUS
INTERRUPT?
NO
YES
END OF
STABILIZATION
DELAY?
ANALOG
INTERRUPT?
NO
NO
CDET
YES
YES
INTERRUPT?
TURN ON CPU CLOCK.
NO
COP
RESET?
1. LOAD PC WITH RESET VECTOR
OR
NO
2. SERVICE INTERRUPT.
a. SAVE CPU REGISTERS ON STACK.
b. SET I BIT IN CCR.
c. LOAD PC WITH INTERRUPT VECTOR.
Figure 6-1. STOP and WAIT Flowchart
MOTOROLA
6-2
LOW POWER MODES
MC68HC05SB7
REV 2.1
FREESCALE [ Freescale ]
