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68HC705SB7 参数 Datasheet PDF下载

68HC705SB7图片预览
型号: 68HC705SB7
PDF下载: 下载PDF文件 查看货源
内容描述: 规格(通用版) [SPECIFICATION (General Release)]
分类和应用:
文件页数/大小: 170 页 / 1982 K
品牌: FREESCALE [ Freescale ]
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GENERAL RELEASE SPECIFICATION  
August 27, 1998  
read of the TSR with the TOF flag bit set; and then followed by an access to the  
LSB of the timer registers (TMRL) or by reset. The TOIE enable bit is unaffected  
by reset.  
4.7  
4.8  
SM-BUS INTERRUPT  
There is one SM-Bus interrupt flag that causes SM-Bus interrupt whenever it is  
set and enabled. The interrupt flags is in the SM-Bus Status Register (SMSR) and  
the enable bit is in SM-Bus Control Register (SMCR). SM-Bus interrupt can wake  
up MCU from WAIT mode.  
ANALOG INTERRUPTS  
The analog subsystem can generate the following interrupts:  
Voltage on positive input of comparator is greater than the voltage on the  
negative input of comparator.  
Trigger of the input capture interrupt from the programmable Timer as  
described in Section 4.6 above.  
Setting the I bit in the condition code register disables analog subsystem inter-  
rupts. The controls for these interrupts are in the analog subsystem control regis-  
ter (ACR) located at $001D and the status bits are in the analog subsystem status  
register (ASR) located at $001E.  
4.8.1 Comparator Input Match Interrupt  
A comparator input match interrupt occurs if the compare flag bit (CPF) in the  
ASR becomes set while the comparator interrupt enable bit (CPIE) in the ACR is  
also set. Reset clears these bits.  
4.8.2 Input Capture Interrupt  
The analog subsystem can also generate an input capture interrupt through the  
programmable Timer. The input capture can be triggered when there is a match in  
the input conditions for the voltage comparator. If comparator sets the CPF flag bit  
in the ASR and the input capture enable (ICEN) in the ACR is set then an input  
capture will be performed by the programmable Timer. If the ICIE enable bit in the  
TCR is also set then an input compare interrupt will occur. Reset clears these bits.  
NOTE  
In order for the analog subsystem to generate an interrupt using the input capture  
function of the programmable Timer the ICEN enable bit in the ACR and the ICIE  
enable bit in the TCR must both be set.  
4.9  
CURRENT DETECT INTERRUPT  
The Current Sense Amplifier circuit can be configured to generate an interrupt  
once it detects a current passing through the current sensing resistor.  
MOTOROLA  
4-8  
INTERRUPTS  
MC68HC05SB7  
REV 2.1  
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