Peripheral Memory Mapped Registers
Table 4-15 Pulse Width Modulator A Registers Address Map (Continued)
(PWMA_BASE = $00 F140)
PWMA is NOT available in the 56F8167 device
Register Acronym
Address Offset
Register Description
PWMA_PMPORT
PWMA_PMICCR
$11
$12
Port Register
PWM Internal Correction Control Register
Table 4-16 Pulse Width Modulator B Registers Address Map
(PWMB_BASE = $00 F160)
Register Acronym
Address Offset
Register Description
PWMB_PMCTL
$0
$1
Control Register
PWMB_PMFCTL
PWMB_PMFSA
Fault Control Register
Fault Status Acknowledge Register
Output Control Register
Counter Register
$2
PWMB_PMOUT
$3
PWMB_PMCNT
$4
PWMB_PWMCM
PWMB_PWMVAL0
PWMB_PWMVAL1
PWMB_PWMVAL2
PWMB_PWMVAL3
PWMB_PWMVAL4
PWMB_PWMVAL5
PWMB_PMDEADTM
PWMB_PMDISMAP1
PWMB_PMDISMAP2
PWMB_PMCFG
$5
Counter Modulo Register
Value Register 0
$6
$7
Value Register 1
$8
Value Register 2
$9
Value Register 3
$A
$B
$C
$D
$E
$F
$10
$11
$12
Value Register 4
Value Register 5
Dead Time Register
Disable Mapping Register 1
Disable Mapping Register 2
Configure Register
PWMB_PMCCR
Channel Control Register
PWMB_PMPORT
PWMB_PMICCR
Port Register
PWM Internal Correction Control Register
Table 4-17 Quadrature Decoder 0 Registers Address Map
(DEC0_BASE = $00 F180)
Register Acronym
Address Offset
Register Description
Decoder Control Register
DEC0_DECCR
DEC0_FIR
$0
$1
$2
$3
$4
Filter Interval Register
DEC0_WTR
DEC0_POSD
DEC0_POSDH
Watchdog Time-out Register
Position Difference Counter Register
Position Difference Counter Hold Register
56F8367 Technical Data, Rev. 9
Freescale Semiconductor
Preliminary
59
FREESCALE [ Freescale ]
