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56F8345 参数 Datasheet PDF下载

56F8345图片预览
型号: 56F8345
PDF下载: 下载PDF文件 查看货源
内容描述: 16位数字信号控制器 [16-bit Digital Signal Controllers]
分类和应用: 控制器
文件页数/大小: 164 页 / 2236 K
品牌: FREESCALE [ Freescale ]
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Table 2-2 Signal and Package Information for the 128-Pin LQFP  
State  
During  
Reset  
Signal  
Name  
Pin No.  
Type  
Signal Description  
CAN_TX  
120  
Open  
Drain  
Open  
Drain  
FlexCAN Transmit Data — CAN output with internal pull-up  
enable at reset.*  
Output  
Output  
* Note: If a pin is configured as open drain output mode, internal  
pull-up will automatically be disabled when it outputs low.  
Internal pull-up will be enabled unless it has been manually  
disabled by clearing the corresponding bit in the PUREN register  
of the GPIO module, when it outputs high.  
If a pin is configured as push-pull output mode, internal pull-up  
will automatically be disabled, whether it outputs low or high.  
TC0  
111  
113  
Schmitt  
Input/  
Output  
Input,  
pull-up  
enabled  
TC0 - 1 — Timer C, Channels 0 and 1  
(GPIOE8)  
Schmitt  
Input/  
Output  
Port E GPIO — These GPIO pins can be individually  
programmed as input or output pins.  
TC1  
(GPIOE9)  
At reset, these pins default to Timer functionality.  
To deactivate the internal pull-up resistor, clear the appropriate  
bit of the GPIOE_PUR register. See Part 6.5.6 for details.  
TD0  
107  
Schmitt  
Input/  
Output  
Input,  
pull-up  
enabled  
TD0 - TD3 — Timer D, Channels 0, 1, 2 and 3  
(GPIOE10)  
Schmitt  
Input/  
Output  
Port E GPIO — These GPIO pins can be individually  
programmed as input or output pins.  
TD1  
(GPIOE11)  
108  
109  
110  
At reset, these pins default to Timer functionality.  
TD2  
(GPIOE12)  
To deactivate the internal pull-up resistor, clear the appropriate  
bit of the GPIOE_PUR register. See Part 6.5.6 for details.  
TD3  
(GPIOE13)  
IRQA  
IRQB  
52  
53  
Schmitt  
Input  
Input,  
pull-up  
enabled  
External Interrupt Request A and B — The IRQA and IRQB  
inputs are asynchronous external interrupt requests during Stop  
and Wait mode operation. During other operating modes, they  
are synchronized external interrupt requests, which indicate an  
external device is requesting service. They can be programmed  
to be level-sensitive or negative-edge triggered.  
To deactivate the internal pull-up resistor, set the IRQ bit in the  
SIM_PUDR register. See Part 6.5.6 for details.  
56F8345 Technical Data, Rev. 17  
34  
Freescale Semiconductor  
Preliminary  
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