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56F8345 参数 Datasheet PDF下载

56F8345图片预览
型号: 56F8345
PDF下载: 下载PDF文件 查看货源
内容描述: 16位数字信号控制器 [16-bit Digital Signal Controllers]
分类和应用: 控制器
文件页数/大小: 164 页 / 2236 K
品牌: FREESCALE [ Freescale ]
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Signal Pins  
Table 2-2 Signal and Package Information for the 128-Pin LQFP  
State  
During  
Reset  
Signal  
Name  
Pin No.  
Type  
Signal Description  
Home — Quadrature Decoder 1, HOME input  
TB3 — Timer B, Channel 3  
HOME1  
12  
Schmitt  
Input  
Input,  
pull-up  
enabled  
(TB3)  
Schmitt  
Input/  
Output  
(SS1)  
Schmitt  
Input  
SPI 1 Slave Select — In the master mode, this pin is used to  
arbitrate multiple masters. In slave mode, this pin is used to  
select the slave. To activate the SPI function, set the  
HOME_ALT bit in the SIM_GPS register. See Part 6.5.8 for  
details.  
(GPIOC3)  
Schmitt  
Input/  
Port C GPIO — This GPIO pin can be individually programmed  
as input or output pin.  
Output  
In the 56F8345, the default state after reset is HOME1.  
In the 56F8145, the default state is not one of the functions  
offered and must be reconfigured.  
To deactivate the internal pull-up resistor, clear bit 3 in the  
GPIOC_PUR register.  
PWMA0  
PWMA1  
PWMA2  
PWMA3  
PWMA4  
PWMA5  
ISA0  
58  
60  
Output  
In reset,  
output is  
disabled,  
pull-up is  
enabled  
PWMA0 - 5 — These are six PWMA output pins.  
61  
63  
64  
66  
104  
Schmitt  
Input  
Input,  
pull-up  
enabled  
ISA0 - 2 — These three input current status pins are used for  
top/bottom pulse width correction in complementary channel  
operation for PWMA.  
(GPIOC8)  
Schmitt  
Input/  
Output  
Port C GPIO — These GPIO pins can be individually  
programmed as input or output pins.  
ISA1  
(GPIOC9)  
105  
106  
In the 56F8345, these pins default to ISA functionality.  
ISA2  
(GPIOC10)  
In the 56F8145, the default state is not one of the functions  
offered and must be reconfigured.  
To deactivate the internal pull-up resistor, clear the appropriate  
bit of the GPIOC_PUR register. See Part 6.5.6 for details.  
56F8345 Technical Data, Rev. 17  
Freescale Semiconductor  
Preliminary  
31  
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