TRST
(Input)
tTRST
Figure 10-20 TRST Timing Diagram
10.15 Analog-to-Digital Converter (ADC) Parameters
Table 10-23 ADC Parameters
Characteristic
Input voltages
Symbol
VADIN
RES
Min
VREFL
12
Typ
—
Max
VREFH
12
Unit
V
Resolution
—
Bits
Integral Non-Linearity1
Differential Non-Linearity
LSB2
LSB2
INL
—
+/- 2.4
+/- 0.7
+/- 3.2
< +1
DNL
—
Monotonicity
GUARANTEED
—
ADC internal clock
fADIC
RAD
0.5
VREFL
5
5
MHz
V
Conversion range
—
6
VREFH
16
tAIC cycles3
ms
ADC channel power-up time
tADPU
ADC reference circuit power-up time4
Conversion time
tVREF
tADC
—
—
—
6
25
—
tAIC cycles3
tAIC cycles3
Sample time
tADS
—
1
—
Input capacitance
CADI
IADI
—
—
—
—
—
—
—
—
5
—
—
pF
Input injection current5, per pin
Input injection current, total
3
20
mA
mA
mA
mA
IADIT
—
VREFH current
ADC A current
ADC B current
IVREFH
IADCA
IADCB
IADCQ
EGAIN
1.2
25
3
—
25
—
mA
μA
Quiescent current
0
10
Uncalibrated Gain Error (ideal = 1)
+/- .004
+/- .015
—
56F8345 Technical Data, Rev. 17
152
Freescale Semiconductor
Preliminary
FREESCALE [ Freescale ]
