3.9 Quadrature Decoder Timing
1, 2
Table 3-14 Quadrature Decoder Timing
Operating Conditions: VSS = VSSA = 0 V, VDD = VDDA = 3.0–3.6 V, TA = –40° to +85°C, CL ≤ 50pF, fOP = 80MHz
Characteristic
Quadrature input period
Symbol
PIN
Min
Max
—
Unit
ns
8T + 12
4T + 6
2T + 3
Quadrature input high/low period
Quadrature phase period
PHL
—
ns
PPH
—
ns
1. In the formulas listed, T = the clock cycle. For 80MHz operation, T=12.5ns. VSS = 0V, VDD = 3.0–3.6V,
TA = –40° to +85°C, CL ≤ 50pF.
2. Parameters listed are guaranteed by design.
PPH PPH PPH PPH
Phase A
(Input)
PHL
PIN
PHL
Phase B
PHL
(Input)
PIN
PHL
Figure 3-24 Quadrature Decoder Timing
56F807 Technical Data Technical Data, Rev. 16
42
Freescale Semiconductor
FREESCALE [ Freescale ]
