Register Descriptions
5.6.8.2
Vector Address Bus (VAB) Bits 13–0
The value in this register is used as the upper 14 bits of the interrupt vector VAB[20:0]. The lower 7 bits
are determined based on the highest priority interrupt and are then appended onto VBA before presenting
the full VAB to the Core.
5.6.9
Fast Interrupt Match 0 Register (FIM0)
Base + $8
Read
15
0
14
0
13
0
12
0
11
0
10
0
9
0
8
0
7
0
6
0
5
0
4
0
3
2
1
0
0
0
FAST INTERRUPT 0
Write
RESET
0
0
0
0
0
0
0
0
0
0
0
0
Figure 5-11 Fast Interrupt Match 0 Register (FIM0)
5.6.9.1
Reserved—Bits 15–6
This bit field is reserved. Each bit must be set to 0.
5.6.9.2
Fast Interrupt 0 Vector Number (FAST INTERRUPT 0)—Bits 5–0
These values determine which IRQ will be Fast Interrupt 0. Fast Interrupts vector directly to a service
routine based on values in the Fast Interrupt Vector Address registers without having to go to a jump table
first. IRQs used as Fast Interrupts must be set to priority level 2. Unexpected results will occur if a Fast
Interrupt vector is set to any other priority. A Fast Interrupt automatically becomes the highest-priority
level 2 interrupt regardless of its location in the interrupt table prior to being declared as Fast Interrupt.
Fast Interrupt 0 has priority over Fast Interrupt 1. To determine the vector number of each IRQ, refer to
the vector table.
5.6.10 Fast Interrupt 0 Vector Address Low Register (FIVAL0)
Base + $9
Read
15
14
13
12
11
10
9
8
7
6
5
4
3
2
0
1
0
0
0
FAST INTERRUPT 0 VECTOR ADDRESS LOW
Write
0
0
0
0
0
0
0
0
0
0
0
0
0
RESET
Figure 5-12 Fast Interrupt 0 Vector Address Low Register (FIVAL0)
5.6.10.1 Fast Interrupt 0 Vector Address Low (FIVAL0)—Bits 15–0
The lower 16 bits of the vector address used for Fast Interrupt 0. This register is combined with FIVAH0
to form the 21-bit vector address for Fast Interrupt 0 defined in the FIM0 register.
56F8036 Data Sheet, Rev. 6
Freescale Semiconductor
73
FREESCALE [ Freescale ]
