Register Descriptions
2
5.6.5.5
I C Status Interrupt Priority Level (I2C_STAT IPL)—Bits 7–6
2
This field is used to set the interrupt priority level for the I C Status IRQ. This IRQ is limited to priorities
0 through 2. It is disabled by default.
•
•
•
•
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
2
5.6.5.6
I C Transmit Interrupt Priority Level (I2C_TX IPL)—Bits 5–4
2
This field is used to set the interrupt priority level for the I C Transmit IRQ. This IRQ is limited to
priorities 0 through 2. It is disabled by default.
•
•
•
•
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
2
5.6.5.7
I C Receive Interrupt Priority Level (I2C_RX IPL)— Bits 3–2
2
This field is used to set the interrupt priority level for the I C Receiver IRQ. This IRQ is limited to
priorities 0 through 2. It is disabled by default.
•
•
•
•
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
2
5.6.5.8
I C General Call Interrupt Priority Level (I2C_GEN IPL)—Bits 1–0
2
This field is used to set the interrupt priority level for the I C General Call IRQ. This IRQ is limited to
priorities 0 through 2. It is disabled by default.
•
•
•
•
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
5.6.6
Interrupt Priority Register 5 (IPR5)
Base + $5
Read
15
14
13
12
11
10
9
8
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
0
PIT1 IPL
PIT0 IPL
COMPB IPL
COMPA IPL
Write
RESET
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 5-8 Interrupt Priority Register 5 (IPR6)
56F8036 Data Sheet, Rev. 6
Freescale Semiconductor
69