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56F8036_10 参数 Datasheet PDF下载

56F8036_10图片预览
型号: 56F8036_10
PDF下载: 下载PDF文件 查看货源
内容描述: 16位数字信号控制器 [16-bit Digital Signal Controllers]
分类和应用: 控制器
文件页数/大小: 164 页 / 893 K
品牌: FREESCALE [ Freescale ]
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Register Descriptions  
5.6.3  
Interrupt Priority Register 2 (IPR2)  
Base + $2  
Read  
15  
14  
13  
0
12  
0
11  
0
10  
0
9
8
7
6
5
4
3
2
1
0
QSCI0_XMIT  
IPL  
QSPI0_XMIT  
IPL  
QSPI0_RCV  
IPL  
GPIOA IPL  
GPIOB IPL  
GPIOC IPL  
Write  
RESET  
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 5-5 Interrupt Priority Register 2 (IPR2)  
5.6.3.1  
QSCI 0 Transmitter Empty Interrupt Priority Level (QSCI0_XMIT IPL)—  
Bits 15–14  
This field is used to set the interrupt priority level for the QSCI0 Transmitter Empty IRQ. This IRQ is  
limited to priorities 0 through 2. It is disabled by default.  
00 = IRQ disabled (default)  
01 = IRQ is priority level 0  
10 = IRQ is priority level 1  
11 = IRQ is priority level 2  
5.6.3.2  
Reserved—Bits 13–10  
This bit field is reserved. Each bit must be set to 0.  
5.6.3.3  
QSPI 0 Transmitter Empty Interrupt Priority Level (QSPI0_XMIT IPL)—  
Bits 9–8  
This field is used to set the interrupt priority level for the QSPI0 Transmitter Empty IRQ. This IRQ is  
limited to priorities 0 through 2. It is disabled by default.  
00 = IRQ disabled (default)  
01 = IRQ is priority level 0  
10 = IRQ is priority level 1  
11 = IRQ is priority level 2  
5.6.3.4  
QSPI 0 Receiver Full Interrupt Priority Level (QSPI0_RCV IPL)—Bits 7–6  
This field is used to set the interrupt priority level for the QSPI0 Receiver Full IRQ. This IRQ is limited  
to priorities 0 through 2. It is disabled by default.  
00 = IRQ disabled (default)  
01 = IRQ is priority level 0  
10 = IRQ is priority level 1  
11 = IRQ is priority level 2  
56F8036 Data Sheet, Rev. 6  
Freescale Semiconductor  
65  
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