Table 4-10 Analog-to-Digital Converter Registers Address Map (Continued)
(ADC_BASE = $00 F080)
Register Acronym
Address Offset
Register Description
Low Limit Register 6
ADC_LOLIM6
ADC_LOLIM7
ADC_HILIM0
ADC_HILIM1
ADC_HILIM2
ADC_HILIM3
ADC_HILIM4
ADC_HILIM5
ADC_HILIM6
ADC_HILIM7
ADC_OFFST0
ADC_OFFST1
ADC_OFFST2
ADC_OFFST3
ADC_OFFST4
ADC_OFFST5
ADC_OFFST6
ADC_OFFST7
ADC_PWR
$17
$18
$19
$1A
$1B
$1C
$1D
$1E
$1F
$20
$21
$22
$23
$24
$25
$26
$27
$28
$29
$2A
Low Limit Register 7
High Limit Register 0
High Limit Register 1
High Limit Register 2
High Limit Register 3
High Limit Register 4
High Limit Register 5
High Limit Register 6
High Limit Register 7
Offset Register 0
Offset Register 1
Offset Register 2
Offset Register 3
Offset Register 4
Offset Register 5
Offset Register 6
Offset Register 7
Power Control Register
Voltage Reference Register
Reserved
ADC_VREF
Table 4-11 Serial Communication Interface Registers Address Map
(SCI_BASE = $00 F0B0)
Register Acronym
Address Offset
Register Description
Baud Rate Register
SCI_RATE
SCI_CTRL1
SCI_CTRL2
SCI_STAT
SCI_DATA
$0
$1
$2
$3
$4
Control Register 1
Control Register 2
Status Register
Data Register
56F8014 Technical Data, Rev. 9
38
Freescale Semiconductor
Preliminary
FREESCALE [ Freescale ]
