欢迎访问ic37.com |
会员登录 免费注册
发布采购

33742S 参数 Datasheet PDF下载

33742S图片预览
型号: 33742S
PDF下载: 下载PDF文件 查看货源
内容描述: 系统基础芯片( SBC)与增强型高速CAN收发器 [System Basis Chip (SBC) with Enhanced High-Speed CAN Transceiver]
分类和应用:
文件页数/大小: 65 页 / 1605 K
品牌: FREESCALE [ Freescale ]
 浏览型号33742S的Datasheet PDF文件第25页浏览型号33742S的Datasheet PDF文件第26页浏览型号33742S的Datasheet PDF文件第27页浏览型号33742S的Datasheet PDF文件第28页浏览型号33742S的Datasheet PDF文件第30页浏览型号33742S的Datasheet PDF文件第31页浏览型号33742S的Datasheet PDF文件第32页浏览型号33742S的Datasheet PDF文件第33页  
FUNCTIONAL DEVICE OPERATION  
OPERATIONAL MODES  
Watchdog: Timeout OR V  
DD  
Low  
Watchdog: Time-out & Nostop &!BATFAIL  
SPI: Stand-by and  
Watchdog Trigger  
2
Reset Counter (3.4 ms)  
Expired  
1
3
Standby  
Reset  
Normal Request  
1
V
Low OR Watchdog:  
DD  
Timeout 350 ms & Nostop  
4
2
Power  
Down  
1
Normal  
Stop  
SPI: Stop & CS  
LOW to HIGH  
Transition  
1
Watchdog: Timeout OR V  
Low  
DD  
Wake-Up  
(V  
DD  
High Temperature OR [V  
Low > 100 ms & V  
> BFew]) & Nostop &!BATFAIL  
DD  
SUP  
Sleep  
Denotes priority  
1
2
3
4
State Machine Description  
Nostop = Nostop bit = 1  
!Nostop = Nostop bit = 0  
BATFAIL = Batfail bit = 1  
!BATFAIL = Batfail bit = 0  
Watchdog: Timeout = TIM1 register not written before watchdog timeout period  
expired, or watchdog written in incorrect time window if watchdog window  
selected (except Stop mode). In Normal Request mode, timeout is 355 ms  
p2.2 (350 ms p3) ms.  
V
V
V
Overtemperature = V  
thermal shutdown occurs  
SPI: Sleep = SPI write command to MCR register, data sleep  
SPI: Stop = SPI write command to MCR register, data stop  
SPI: Normal = SPI write command to MCR register, data normal  
SPI: Standby = SPI write command to MCR register, data standby  
DD  
DD  
DD  
DD  
below reset threshold  
LOW = V  
DD  
LOW > 100 ms = V  
below reset threshold for more than 100 ms  
DD  
Watchdog: Trigger = TIM1 subregister write operation  
> BFew = V > Battery Fail Early Warning (6.1 V typical)  
V
SUP  
SUP  
Notes  
42. These two SPI commands must be sent consecutively in this sequence.  
43. If watchdog activated.  
Figure 13. SBC State Diagram (Not Valid in Debug Modes)  
Power-Up  
Reset  
Operation after power-up if no trigger appears  
Operation after reset of BATFAIL if no trigger appears  
Normal  
Request  
Yes  
Batfail  
No  
No  
No  
Yes  
Trigger  
Yes  
No Stop  
Sleep  
Normal  
Figure 14. Operation After SBC Power-Up  
33742  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
29  
 复制成功!