FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
CAN PHYSICAL INTERFACE
The SBC features a high-speed CAN physical interface for bus communication from 60 kbps up to 1.0 Mbps. Figure 19 is a
simplified block diagram of the CAN interface of the 33742.
V2
33742
V2
V2
SPI Control
TXD
RXD
Driver
QH
CANH
CANL
V2
CANH Line
Bus Termination (60
CANL Line
Differential
Receiver
2.5 V
Ω
)
V2
Driver
QL
SPI Control
VSUP
Internal
Wake-Up
Signal
Wake-Up
Pattern
Recognition
Wake-Up
Receiver
SPI Control
Figure 19. Simplified Block Diagram of CAN Interface
CAN INTERFACE SUPPLY
CAN DRIVER OPERATION IN TXRX MODE
The supply voltage for the CAN transceiver is the V2 pin.
The CAN interface also has a supply path from the external
supply line through the VSUP pin. This path is used in CAN
Sleep mode to allow wake-up detection.
When the CAN interface is in TXRX mode, the driver has
two states: recessive or dominant. The driver state is
controlled by the TXD pin. The bus state is reported through
the RXD pin.
During CAN communication (transmission and reception),
the CAN interface current is sourced from the V2 pin. During
CAN low power mode, the current is sourced from the VSUP
pin.
When TXD is HIGH, the driver is set in recessive state, and
CANH and CANL lines are biased to the voltage set at V2
divided by 2, or approximately 2.5 V.
When TXD is LOW, the bus is set into dominant state:
CANL and CANH drivers are active. CANL is pulled to
ground, and CANH is pulled HIGH toward 5.0 V (voltage at
V2).
MAIN OPERATION MODES DESCRIPTION
The CAN interface of the SBC has two main operating
modes: TXRX and Sleep mode. The modes are controlled by
the CAN SPI Register. In the TXRX mode, which is used for
communication, four different slew rates are available for the
user. In the Sleep mode, the user has the option of enabling
or disabling the remote CAN wake-up capability.
The RXD pin reports the bus state: CANH minus CANL
voltage is compared versus an internal threshold (a few
hundred millivolts). If CANH minus CANL is below the
threshold, the bus is recessive and RXD is set HIGH. If CANH
minus CANL is above the threshold, the bus is dominant and
RXD is set LOW. This is illustrated in Figure 19.
33742
Analog Integrated Circuit Device Data
Freescale Semiconductor
33
FREESCALE [ Freescale ]
