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33742S 参数 Datasheet PDF下载

33742S图片预览
型号: 33742S
PDF下载: 下载PDF文件 查看货源
内容描述: 系统基础芯片( SBC)与增强型高速CAN收发器 [System Basis Chip (SBC) with Enhanced High-Speed CAN Transceiver]
分类和应用:
文件页数/大小: 65 页 / 1605 K
品牌: FREESCALE [ Freescale ]
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FUNCTIONAL DEVICE OPERATION  
OPERATIONAL MODES  
NORMAL MODE  
RESET MODE  
In Normal mode, both the VDD and V2 regulators are in the  
ON state. All functions are available in this operating mode  
(watchdog, wake-up input reading through SPI, HS  
activation, and CAN communication). The watchdog timer is  
running and must be periodically cleared through SPI.  
In the Reset mode, the RST pin is LOW and a timer runs  
for tRSTDUR time. After tRSTDUR has elapsed, the 33742  
enters the Normal Request operating mode. The Reset mode  
is entered if a reset condition occurs (VDD LOW, watchdog  
time-out, or watchdog trigger in a closed window).  
STOP MODE  
NORMAL REQUEST MODE  
The V2 regulator is turned OFF by disabling the V2CTRL  
pin. The VDD regulator is activated in a special low power  
mode supplying only a few mA of current. This maintains  
“keep alive” power for the application’s MCU while the MCU  
is in a power-saving state (i.e., a MCU’s version of Stop or  
Wait). In the Stop mode, the supply current available from  
VSUP pin is very low.  
The Normal Request mode is a temporary operating mode  
automatically entered by the SBC after the Reset mode or  
after the 33742 wakes up from the Stop mode.  
After a wake-up from the Sleep mode or after a device  
power-up, the SBC enters the Reset mode prior to entering  
the Normal Request mode. After a wake-up from the Stop  
mode, the 33742 enters the Normal Request mode directly.  
Both parts (the SBC or the MCU) can be awakened from  
either the 33742 side (for example, cyclic sense, forced  
wake-up, CAN message, wake-up inputs, and overcurrent on  
VDD) or from the MCU side (key wake-up, etc.).  
In Normal Request mode, the VDD regulator is ON, the V2  
regulator is OFF, and the RST pin is HIGH. As soon as the  
SBC enters the Normal Request mode, an internal 350 ms  
timer is started (parameter tNRTOUT). During this time, the  
application’s MCU must address the 33742 via SPI and  
configure the TIM1 sub register to select the watchdog  
period. This is required of the SBC to stop the 350 ms  
watchdog timer and enter the Normal or Standby mode and  
to set the watchdog timer configuration.  
Stop mode is always selected via SPI. In Stop mode, the  
watchdog software may be either running or not running  
depending upon selection by SPI (Reset Control Register  
[RCR], bit WDSTOP). To clear a running watchdog timer, the  
SBC must be awakened using the CS pin (SPI wake-up). In  
Stop mode, wake-up is identical to that in Sleep mode, with  
the addition of CS and VDD overcurrent wake-up. Refer to  
Table 7, page 25.  
NORMAL REQUEST ENTERED AND NO  
WATCHDOG CONFIGURATION OCCURS  
If the Normal Request mode is entered after the SBC  
powers up or after a wake-up from Stop mode and no  
watchdog configuration occurs before the 350 ms time period  
has expired, the device enters the Reset mode. If no  
watchdog configuration is performed, the 33742 will cycle  
from the Normal Request mode to Reset mode to Normal  
Request mode.  
SLEEP MODE  
In Sleep mode, the VDD and V2 regulators are OFF.  
Current consumption from the VSUP pin is cut. In Sleep  
mode, the SBC can be awakened by sensing individual level  
individual level changes in the L0:L3 inputs, by cyclic  
checking of the L0:L3 inputs, by the forced wake-up timer, or  
from the CAN physical interface upon receiving a CAN  
message. When a wake-up occurs, the SBC goes first into  
the Reset mode before entering Normal Request mode.  
If the Normal Request mode is entered after a wake-up  
from Sleep mode, and no watchdog configuration occurs  
while the 33742S is in Normal Request mode, the SBC  
returns to the Sleep mode.  
Table 7. Table of Operations  
Watchdog  
Wake-Up  
Capabilities  
(if Enabled)  
Voltage Regulator  
Mode  
RST Pin  
INT Pin  
CAN Cell  
HS Switch  
Software  
Normal  
Request  
VDD: ON,  
V2: OFF,  
HS: OFF  
Low for tRSTDUR time,  
then HIGH  
Normal  
VDD: ON,  
V2: ON,  
HS: Controllable  
Normally HIGH.  
Active LOW if WDOG  
or VDD undervoltage  
occurs  
If enabled, signal  
failure (VDD  
Pre-Warning  
Running  
Running  
TXD/RXD  
Low power  
Temp, CAN, HS)  
Standby  
VDD: ON,  
V2: OFF,  
Same as Normal  
mode  
Same as Normal  
mode  
HS: Controllable  
33742  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
25  
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