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33742S 参数 Datasheet PDF下载

33742S图片预览
型号: 33742S
PDF下载: 下载PDF文件 查看货源
内容描述: 系统基础芯片( SBC)与增强型高速CAN收发器 [System Basis Chip (SBC) with Enhanced High-Speed CAN Transceiver]
分类和应用:
文件页数/大小: 65 页 / 1605 K
品牌: FREESCALE [ Freescale ]
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FUNCTIONAL DEVICE OPERATION  
OPERATIONAL MODES  
The VSUP should be left open or forced to a value equal  
to or above V.  
MCU FLASH PROGRAMMING CONFIGURATION  
To allow for new software to be loaded into a SBC’s MCU  
NVM or to standalone EEPROM or Flash, the 33742 is  
capable of having (1) VSUP applied to it to from an external  
power 5.0 V supply and (2) having the RST and the WDOG  
outputs pins eternally forced to 0.0 V or 5.0 V without  
damaging the device.  
The VDD regulator uses an internal pass transistor  
between VSUP and the VDD output pin. Biasing the VDD  
output pin with a voltage greater than VDD potential will force  
current through the body diode of the internal pass transistor  
to the VSUP pin.  
The RST pin is periodically pulled LOW for the tRSTDUR  
time (device in Reset mode), before being pulled to VDD for  
350 ms typical (device in Normal Request mode). During the  
time reset is LOW, the RST pin sinks 5.0 mA maximum  
(IPDW).  
This allows the SBC to be externally powered and off-  
board signals to be applied to the reset pins. No functions of  
the 33742 are operating. Figure 18 illustrates a typical  
configuration for the connection of programming and  
debugging tools.  
VDD  
VSUP (Open or > 5.0 V  
RST  
MCU with  
33742  
WDOG  
Flash Memory  
Programming Bus  
Programming Tool  
5.0 V  
Note External supply and sources applied to VDD, RST, and WDOG test points on application circuit board.  
Figure 18. Simplified Schematic for Microcontroller Flash Programming  
33742  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
32  
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