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33742S 参数 Datasheet PDF下载

33742S图片预览
型号: 33742S
PDF下载: 下载PDF文件 查看货源
内容描述: 系统基础芯片( SBC)与增强型高速CAN收发器 [System Basis Chip (SBC) with Enhanced High-Speed CAN Transceiver]
分类和应用:
文件页数/大小: 65 页 / 1605 K
品牌: FREESCALE [ Freescale ]
 浏览型号33742S的Datasheet PDF文件第27页浏览型号33742S的Datasheet PDF文件第28页浏览型号33742S的Datasheet PDF文件第29页浏览型号33742S的Datasheet PDF文件第30页浏览型号33742S的Datasheet PDF文件第32页浏览型号33742S的Datasheet PDF文件第33页浏览型号33742S的Datasheet PDF文件第34页浏览型号33742S的Datasheet PDF文件第35页  
FUNCTIONAL DEVICE OPERATION  
OPERATIONAL MODES  
Watchdog: Timeout 350 ms  
Power  
Down  
Reset Counter  
(3.4 ms) Expired  
Reset  
Normal Request  
SPI: MCR (0000) and Normal Debug  
SPI: MCR (0000) and Standby Debug  
Normal Debug  
Normal  
Standby Debug  
Figure 16. Transitions to Enter Debug Modes  
Watchdog: Time-out 350 ms  
Wake-Up  
Wake-Up  
Reset Counter  
(3.4 ms) Expired  
Reset  
Sleep  
Stop (1)  
Normal Request  
R
R
R
R
R
R
Normal  
Stop Debug  
Standby  
E
E
SPI: Standby Debug  
SPI: Normal Debug  
Normal Debug  
Standby Debug  
R
R
(1) If Stop mode is entered, it is entered without watchdog, no matter the WDSTOP bit.  
(E) Debug mode entry point (Step 5 of the Debug mode entering sequence).  
(R) Represents transitions to Reset mode due to V1 low.  
Figure 17. Simplified 33742S State Diagram in Debug Modes  
33742  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
31  
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