Test Circuits and Waveforms
V
BV
DSS
DS
t
P
V
DS
L
I
AS
V
DD
VARY t TO OBTAIN
P
+
-
R
REQUIRED PEAK I
G
AS
V
DD
V
GS
DUT
t
P
I
0V
AS
0
0.01Ω
t
AV
Figure 14. Unclamped Energy Test Circuit
Figure 15. Unclamped Energy Waveforms
V
DS
V
Q
DD
g(TOT)
R
L
V
GS
V
DS
V
= 10V
GS
Q
g(5)
V
GS
+
-
Q
gs2
V
= 5V
GS
V
DD
DUT
V
= 1V
GS
I
g(REF)
0
Q
g(TH)
Q
Q
gs
gd
I
g(REF)
0
Figure 16. Gate Charge Test Circuit
Figure 17. Gate Charge Waveforms
V
DS
t
t
ON
OFF
t
d(OFF)
t
d(ON)
R
t
t
f
L
r
V
DS
90%
90%
+
V
GS
V
DD
10%
10%
0
-
DUT
90%
50%
R
GS
V
GS
50%
PULSE WIDTH
10%
V
GS
0
Figure 18. Switching Time Test Circuit
Figure 19. Switching Time Waveforms
7
www.fairchildsemi.com
FDS8880 Rev. A1
FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
