XRT86L30
REV. 1.0.1
SINGLE T1/E1/J1 FRAMER/LIU COMBO
TABLE 45: TRANSMIT
INTERFACE
C
ONTROL
REGISTER - E1 MODE
R
EGISTER 32 - E1 MODE
IT UNCTION
T
RANSMIT
I
NTERFACE
C
ONTROL EGISTER (TICR)
R
HEX ADDRESS:0X0120
B
F
TYPE
D
EFAULT
DESCRIPTION-OPERATION
1
TxIMODE[1]
TxIMODE[0]
R/W
R/W
0
0
Tx Interface Mode selection
This mode selection determines the interface speed.
When TxMUXEN = 0,
0
00 = Transmit interface is taking data at a rate of 2.048Mbit/s.
01 = Transmit interface is taking data at a rate of 2.048Mbit/s.
10 = Transmit interface is taking data at a rate of 4.096Mbit/s.
11 = Transmit interface is taking data at a rate of 8.192Mbit/s.
When TxMUXEN = 1,
00 = Reserved
01 = Transmit interface is taking data at a rate of 16.384Mbit/s from
channel 0 and bit-demultiplexing into 4 channels from to the LIU out-
puts on channels 0 through 3. The TxSYNC pulse remains “High” dur-
ing the first bit of each E1 frame.
10 = Transmit interface is taking data at a rate of 16.384Mbit/s from
channel 0 and byte-demultiplexing into 4 channels from to the LIU out-
puts on channels 0 through 3 (HMVIP Mode). The TxSYNC pulse
remains “High” during the last two bits of the previous E1 frame and the
first two bits of the current E1 frame.
11 = Transmit interface is taking data at a rate of 16.384Mbit/s from
channel 0 and byte-demultiplexing into 4 channels from to the LIU out-
puts on channels 0 through 3 (H.100 Mode). The TxSYNC pulse
remains “High” during the last bit of the previous E1 frame and the first
bit of the current E1 frame.
NOTE: Channel 4 is de-multiplexed into the LIU outputs at channel 4
through 7.
TABLE 46: TRANSMIT
I
NTERFACE
CONTROL
REGISTER - T1 MODE
R
EGISTER 32 - T1 MODE
TRANSMIT
I
NTERFACE
C
ONTROL
R
EGISTER (TICR)
HEX ADDRESS:0X0120
B
IT UNCTION
F
TYPE
D
EFAULT
DESCRIPTION-OPERATION
7
TxSyncFrD
R/W
0
Transmit Synchronous Fractional Data Interface
0 = Fractional data is clocked into the chip using TxChCLK
1 = Fractional data is clocked in to the chip using TxSerClk (ungapped).
TxChn[4:0] still
indicates the time slot number if TxFr1544 is not 1, TxIMODE[1:0] = 00,
and
TxMUXEN = 0. TxChClk is used as fractional data enable.
6
5
Reserved
-
-
Reserved
TxPLClkEnb
R/W
0
Transmit Payload Clock Enable
1 = TxSerClk will output Tx clock with OH bit period blocked in 1.544MHz
clock output
mode.
TxSync Is Low
0
TxSync is Low
In H.100 and HMVIP Mode
0 = TxSync is active “Low”
1 = TxSync is active “High”
64
EXAR [ EXAR CORPORATION ]
