XRT86L30
SINGLE T1/E1/J1 FRAMER/LIU COMBO
RECEIVE LINE INTERFACE
REV. 1.0.1
S
IGNAL
NAME
P
IN
#
TYPE
DESCRIPTION
RxLOS
43
O
Receive Loss of Signal Output Indicator
This output pin will toggle “High” (declare LOS) if the Receive block associated
with Channel N determines that an RLOS condition occurs according to G.775
Conversely, the XRT86L30 will "TRI-State" this pin anytime (and for the duration
that) the Receive DS1/E1 Framer or LIU block is NOT declaring the LOS defect
condition.
N
OTE: Since the XRT86L30 tri-states this output pin (anytime the channel is
not declaring the LOS defect condition), the user MUST connect a "pull-
down" resistor (ranging from 1K to 10K) to each RxLOS output pin, to
pull this output pin to the logic "LOW" condition, whenever the Channel
is NOT declaring the LOS defect condition.
This pin is OR-ed with the LIU RLOS and the Framer RLOS bit. If either the LIU
RLOS or the Framer RLOS bit pulses high, these RLOS pins will be set to
“High”.
TRANSMIT LINE INTERFACE
S
IGNAL
NAME
P
IN
#
TYPE
DESCRIPTION
TTIP
8
O
Transmit Positive Analog Output
TTIP is the positive differential output to the line interface. Along with the
TRING signal, these pins should be coupled to a 1:2 step up transformer for
proper operation. This pin should have a series line capacitor of 0.68µF.
TRING
TxON
6
O
I
Transmit Negative Analog Output
TRING is the negative differential output to the line interface. Along with the
TTIP signal, these pins should be coupled to a 1:2 step up transformer for
proper operation.
128
Transmitter On
Upon power up, the transmit output (TTIP/TRING) is tri-stated. Turning the
transmitter On or Off is selected by programming the appropriate register if this
pin is pulled “High”. If the TxON pin is pulled “Low”, the transmitter is tri-stated.
NOTE: Internally pulled “Low” with a 50kΩ resistor.
TIMING INTERFACE
S
IGNAL
NAME
P
IN
#
TYPE
DESCRIPTION
MCLKIN
24
I
Master Clock Input:
This pin is used to provide the timing reference for the internal master clock of
the device. The frequency of this clock is programmable from 8kHz to
16.384MHz in register 0x0FE9.
MCLKnOUT
25
O
LIU T1/E1 Output Clock Reference
This output clock depends on the mode of operation. In T1 mode, this output
pin is defaulted to 1.544MHz, but can be programmed to output 3.088MHz,
6.176MHz, or 12.352MHz in register 0x0FE4. In E1 mode, this output pin is
defaulted to 2.048MHz, but can be programmed to 4.096MHz, 8.192MHz, or
16.384MHz in register 0x0FE4.
15
EXAR [ EXAR CORPORATION ]
