XRT86L30
SINGLE T1/E1/J1 FRAMER/LIU COMBO
REV. 1.0.1
OVERHEAD INTERFACE
S
IGNAL
NAME
P
IN
#
TYPE
DESCRIPTION
TxOH
51
I
Transmit Overhead Input
This input pin, along with TxOHCLK functions as the Transmit Overhead input
port.
DS1 Mode
This input pin will become active if the Transmit Section has been configured to
use this input as the source for the Facility Data Link bits in ESF framing mode,
Fs bits in the SLC96 and N framing mode, and R bit in T1DM mode. The data
that is input into this pin will be inserted into the Data Link Bits within the out-
bound DS1 frames at the falling edge of TxSERCLK.
NOTE: This input pin will be disabled if the framer is using the Transmit HDLC
Controller, or the TxSER input as the source for the Data Link Bits.
E1 Mode
This input pin will become active if the Transmit Section has been configured to
use this input as the source for the Data Link bits. The data that is input into this
pin will be inserted into the Sa4 through Sa8 bits (the National Bits) within the
outbound non-FAS E1 frames.
NOTE: This input pin will be disabled if the framer is using the Transmit HDLC
Controller, or the TxSER input as the source for the Data Link Bits.
TxOHCLK
57
O
Transmit OH Serial Clock Output Signal
This output clock signal functions as a demand clock signal for the transmit
overhead data input interface block.
DS1/E1 Mode
If the TxOH pins have been configured to be the source for the Facility Data Link
bits, then the framer will provide a clock edge for each Data Link Bit. The Data
Link Equipment can provide data to TxOH on the rising edge of TxOHCLK. The
framer will latch the data on the falling edge of this clock signal.
RxOH
26
O
Receive Overhead Output
This pin, along with RxOHCLK functions as the Receive Overhead Output Inter-
face.
DS1 Mode
This pin unconditionally outputs the contents of the Facility Data Link Bit in ESF
framing mode, Fs bit in the SLC96 and N framing mode, and R bit in T1DM
framing mode.
NOTE: This output pin is active even if the Receive HDLC Controller is active.
E1 mode
This pin unconditionally outputs the contents of the National Bits (Sa4 through
Sa8). If the framer has been configured to interpret the National bits of the
incoming E1 frames as carrying Data Link information, then the Receive Over-
head Output Interface will provide a clock pulse on RxOHCLK for each Sa bit
carrying Data Link information.
NOTE: This output pin is active even if the Receive HDLC Controller is active.
RxOHCLK
31
O
Receive OH Serial Clock Output Signal
This pin, along with RxOH functions as the Receive Overhead Output Interface.
DS1/E1 Mode
This pin outputs a clock edge corresponding to each Facility Data Link Bit which
carries Data Link information. The Data Link Equipment can sample data from
RxOH on the rising edge of RxOHCLK. The framer will update the data on the
falling edge of this clock signal.
11
EXAR [ EXAR CORPORATION ]
