XRT86L30
REV. 1.0.1
SINGLE T1/E1/J1 FRAMER/LIU COMBO
RECEIVE SERIAL DATA OUTPUT
S
IGNAL
NAME
P
IN
#
TYPE
DESCRIPTION
RxCHN_4/
RxSCLK
27
O
Receive Time Slot Octet Identifier Output-Bit 4
These output signals (RxCHN4_n through RxCHN0_n) reflect the five-bit binary
value of the number of Time Slot being received and output to the Terminal
Equipment via the Receive Payload Data Output Interface. The Terminal Equip-
ment can use RxCHCLK to sample these five output pins in order to identify the
time slot being processed.
Receive Recovered Line Clock Output
These pins output the recovered T1/E1 line clock (1.544MHz and 2.048MHz) for
each channel in the High-Speed modes of operation.
RxCHCLK
38
O
Receive Channel Clock Output
This pin indicates the boundary of each time slot of an outbound DS1/E1 frame.
DS1/E1 Mode
Each of these output pins is 192kHz/256kHz clock for DS1/E1 respectively
which pulses "High" whenever the Receive Payload Data Input Interface block
outputs the LSB of each of the 24/32 time slots. The Terminal Equipment can
use this clock signal to sample the RxCHN0 through RxCHN4 time slot identifier
pins.
DS1/E1 Fractional Interface Clock
In the fractional interface mode, RxCHCLK can be configured to function as one
of the following: The pin will output a gapped fractional clock that can be used
by terminal equipment to output fractional payload data using the rising edge of
the clock. Otherwise, the fractional payload data is clocked out of the chip using
the un-gapped RxSERCLK pin.
RECEIVE LINE INTERFACE
S
IGNAL
NAME
P
IN
#
TYPE
DESCRIPTION
RTIP
14
I
Receive Positive Analog Input
RTIP is the positive differential input from the line interface. Along with the
RRING signal, these pins should be coupled to a 1:1 transformer for proper
operation. The center tap of the receive transformer should have a bypass
capacitor of 0.1µF to ground (Chip Side).
RRING
13
I
Receive Negative Analog Input
RRING is the negative differential input from the line interface. Along with the
RTIP signal, these pins should be coupled to a 1:1 transformer for proper opera-
tion. The center tap of the receive transformer should have a bypass capacitor
of 0.1µF to ground (Chip Side).
14