XRT86L30
REV. 1.0.1
SINGLE T1/E1/J1 FRAMER/LIU COMBO
TIMING INTERFACE
S
IGNAL
NAME
P
IN
#
TYPE
DESCRIPTION
OSCCLK
86
O
Framer T1/E1 Output Clock Reference
This output clock depends on the mode of operation. In T1 mode, this output
pin is defaulted to 1.544MHz, but can be programmed to output 49.408MHz in
register 0x011E. In E1 mode, this output pin is defaulted to 2.048MHz, but can
be programmed to 65.536MHz in register 0x011E.
8KSYNC
88
O
I
8kHz Clock Output Reference
This pin is an output reference of 8kHz based on the MCLKIN input. Therefore,
the duty cycle of this output is determined by the time period of the input clock
reference.
8KEXTOSC
122
External Oscillator Select
For normal operation, this pin should not be used, or pulled “Low”.
NOTE: This pin is internally pulled “Low” with a 50kΩ resistor.
ANALOG
LOP
19
1
O
I
Factory Test Mode Pin
Note: For Internal Use Only
Loss of Power for E1 Only / Input Pin for Messaging
GPIO CONTROL
S
IGNAL
NAME
P
IN
#
TYPE
DESCRIPTION
GPIO_3
GPIO_2
GPIO_1
GPIO_0
119
118
116
117
I/O
General Purpose Input/Output Pins
The GPIO pins can be used as either inputs or outputs selected by register
0x0102. By default, these pins are inputs. To configure a GPIO pin to be an
output, the register bit must be set to “1”.
JTAG
S
IGNAL
NAME
P
IN
#
TYPE
DESCRIPTION
TCK
111
I
Test clock: Boundary Scan clock input.
Note: This input pin should be pulled “Low” for normal operation
TMS
TDI
114
113
I
I
Test Mode Select: Boundary Scan Mode Select input.
Note: This input pin should be pulled “Low” for normal operation
Test Data In: Boundary Scan Test data input
Note: This input pin should be pulled “Low” for normal operation
TDO
115
112
121
O
I
Test Data Out: Boundary Scan Test data output
TRST
TEST
JTAG Test Reset Input
I
Factory Test Mode Pin
Note: User should tie this pin to ground
aTEST
SENSE
120
18
I
I
Factory Test Mode Pin
Note: User should tie this pin to ground
Factory Test Mode Pin
Note: User should tie this pin to ground
16