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XRT86L30IV 参数 Datasheet PDF下载

XRT86L30IV图片预览
型号: XRT86L30IV
PDF下载: 下载PDF文件 查看货源
内容描述: 单一T1 / E1 / J1成帧器/ LIU COMBO [SINGLE T1/E1/J1 FRAMER/LIU COMBO]
分类和应用:
文件页数/大小: 284 页 / 1793 K
品牌: EXAR [ EXAR CORPORATION ]
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XRT86L30  
REV. 1.0.1  
SINGLE T1/E1/J1 FRAMER/LIU COMBO  
RECEIVE SERIAL DATA OUTPUT  
S
IGNAL  
NAME  
P
IN  
#
TYPE  
DESCRIPTION  
RxSYNC  
33  
I/O  
Receive Single Frame Sync Pulse Input/Output  
This pin is configured to be an input if the slip buffer is enabled in the receive  
path. Otherwise, this pin is an output signal.  
DS1/E1 (RxSYNC as an Input)  
RxSYNC must pulse "High" for one period of RxSERCLK and repeat every  
125µS. The framer will output the first bit of an inbound DS1/E1 frame during  
the provided RxSYNC pulse.  
NOTE  
:
It is imperative that the RxSYNC input signal be synchronized with  
RxSERCLK.  
DS1/E1 (TxSYNC as an output)  
RxSYNC will pulse "High" for one period of RxSERCLK when the receive pay-  
load data Input Interface is processing the first bit of an inbound DS1/E1 frame.  
Framer Bypass Mode  
In framer bypass mode, RxSYNC is used for the negative digital output pin to  
the LIU.  
RxCRCSYNC  
RxCASYNC  
RxSERCLK  
39  
30  
42  
O
O
Multiframe Sync Pulse Output  
This DS1 only signal will pulse "High" for one period of RxSERCLK the instant  
that the Receive payload data Interface is processing the first bit of a DS1 Multi-  
frame.  
Receive CAS Multiframe Sync Output Signal  
This E1 only signal will pulse "High" for one period of RxSERCLK the instant  
that the Receive payload data Interface is processing the first bit of an E1 CAS  
Multi-frame.  
I/O  
Receive Serial Clock Signal  
This clock signal is used by the Receive payload data Output Interface to latch/  
update the contents of RxSER. The output data on RxSER can be updated on  
either the rising edge or the falling edge of RxSERCLK. This pin is configured to  
be an input if the slip buffer is enabled in the receive path. Otherwise, this pin is  
an output signal.  
DS1/E1 Non-Multiplexed High-Speed Backplane Interface (Input Only)  
In the non-multiplexed high-speed interface mode, this pin is used as the timing  
source for the high-speed output data to RxSER. The non-multiplexed modes  
supported are MVIP 2.048MHz, 4.096MHz, and 8.192MHz.  
NOTE: For DS1 mode, the DS-0 data is mapped into an E1 frame by ignoring  
every fourth time slot (don’t care).  
DS1/E1 Multiplexed High-Speed Backplane Interface (Input Only)  
In the multiplexed high-speed interface mode, this pin is used as the timing  
source for the high-speed output data to RxSER. The multiplexed modes sup-  
ported are 12.352MHz (DS1 only), 16.384MHz, 16.384MHz HMVIP, and  
16.384MHz H.100.  
For DS1 mode in 16.384MHz rate, the DS-0 data is mapped into an E1  
frame by ignoring every fourth time slot (don’t care).  
Framer Bypass Mode:  
In framer bypass mode, RxSERCLK is used for the receive clock to the LIU.  
12  
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