XRT86L30
REV. 1.0.1
SINGLE T1/E1/J1 FRAMER/LIU COMBO
2.0 PIN DESCRIPTIONS
TRANSMIT SERIAL DATA INPUT
S
IGNAL
N
AME
P
IN
#
TYPE
DESCRIPTION
TxSER
55
I
Transmit Serial Data Input
This input pin along with TxSERCLK functions as the Transmit Serial input port to
the framer block.
DS1 Mode
Any payload data applied to this pin will be inserted into a DS1 frame and output
onto the T1 line. If the framer is configured accordingly, the framing alignment bits,
facility data link bits, and the CRC-6 bits can be inserted to this input pin. The sig-
nal applied to this input pin can be latched to the Transmit Payload Data Input Inter-
face on either the rising edge or the falling edge of TxSERCLK.
E1 Mode
Any payload data applied to this pin will be inserted into an E1 frame and output
onto the E1 line. All data intended to be transported via Time Slots 1 through 15
and Time slots 17 through 31 must be applied to this input pin. If the framer is con-
figured accordingly, data intended for Time Slots 0 and 16 can also be applied to
this input pin.
Framer Bypass Mode
In framer bypass mode, TxSER is used for the positive digital input pin to the LIU.
TxSERCLK
54
I/O Transmit Serial Clock Input/Output
This clock signal is used by the Transmit payload data Input Interface to latch the
contents of the TxSER signal into the framer. Data that is applied at the TxSER
input can be latched on either the rising edge or the falling edge of TxSERCLK.
DS1/E1 Standard Rate Mode (1.544Mhz/2.048MHz)
If the Transmit Section of the framer has been configured to use TxSERCLK as the
timing source, then this signal will be an input. If the recovered line clock or the
MCLKIN input pin is used as the timing source for the transmitter, then TxSERCLK
will be an output.
DS1/E1 High-Speed Backplane Interface
In High-Speed backplane applications, TxSERCLK is used as the timing source for
the transmit line rate.
Framer Bypass Mode
In framer bypass mode, TxSERCLK is used for the transmit clock to the LIU.
TxSYNC
59
I/O Transmit Single Frame Sync Pulse Input/Output
This pin is configured to be an input if TxSERCLK is used as the timing reference
for the transmitter. This pin is configured as an output if the recovered line clock or
the MCLKIN input pin is used as the timing reference for the transmitter.
DS1/E1 (TxSYNC as an Input)
TxSYNC must pulse "High" for one period of TxSERCLK when the transmit payload
data Input Interface is processing the first bit of an outbound DS1/E1 frame.
NOTE
:
It is imperative that the TxSYNC input signal be synchronized with the
TxSERCLK input signal.
DS1/E1 (TxSYNC as an output)
TxSYNC will pulse "High" for one period of TxSERCLK when the transmit payload
data Input Interface is processing the first bit of an outbound DS1/E1 frame.
Framer Bypass Mode
In framer bypass mode, TxSYNC is used for the negative digital input pin to the LIU.
8