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XRT86L30IV 参数 Datasheet PDF下载

XRT86L30IV图片预览
型号: XRT86L30IV
PDF下载: 下载PDF文件 查看货源
内容描述: 单一T1 / E1 / J1成帧器/ LIU COMBO [SINGLE T1/E1/J1 FRAMER/LIU COMBO]
分类和应用:
文件页数/大小: 284 页 / 1793 K
品牌: EXAR [ EXAR CORPORATION ]
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XRT86L30  
REV. 1.0.1  
SINGLE T1/E1/J1 FRAMER/LIU COMBO  
TABLE 146: MICROPROCESSOR  
REGISTER #559 BIT DESCRIPTION  
R
EGISTER ADDRESS  
C
HANNEL_0  
R
EGISTER  
YPE  
R
VALUE  
ESET  
0X0F03H  
FUNCTION  
T
Bit #  
D7  
NAME  
NLCDE1_n Network Loop Code Detection Enable Bit 1:  
R/W  
0
This bit together with NLCDE0_n control the Loop-Code detec-  
tion of each channel.  
NLCDE1  
NLCDE0  
Function  
Disable Loop-code  
detection  
Detect Loop-Up code  
in receive data  
Detect Loop-Down  
code in receive data  
Automatic Loop-Code  
detection  
0
0
1
1
0
1
0
1
When NLCDE1 =”0” and NLCDE0 = “1” or NLCDE1 = “1” and  
NLCDE0 = “0”, the chip is manually programmed to monitor  
the receive data for the Loop-Up or Loop-Down code respec-  
tively.When the presence of the “00001” or “001” pattern is  
detected for more than 5 seconds, the status of the NLCD bit is  
set to “1” and if the NLCD interrupt is enabled, an interrupt is  
initiated.The Host has the option to control the Loop-Back  
function manually.  
Setting the NLCDE1 = “1” and NLCDE0 = “1” enables the  
Automatic Loop-Code detection and Remote Loop-Back acti-  
vation mode. As this mode is initiated, the state of the NLCD  
interface bit is reset to “0” and the chip is programmed to mon-  
itor the receive data for the Loop-Up code. If the “00001” pat-  
tern is detected for longer than 5 seconds, the NLCD bit is set  
“1”, Remote Loop-Back is activated and the chip is automati-  
cally programmed to monitor the receive data for the Loop-  
Down code. The NLCD bit stays set even after the chip stops  
receiving the Loop-Up code. The Remote Loop-Back condition  
is removed when the chip receives the Loop-Down code for  
more than 5 seconds or if the Automatic Loop-Code detection  
mode is terminated.  
D6  
D5  
NLCDE0_n Network Loop Code Detection Enable Bit 0:  
See description of D7 for function of this bit.  
R/W  
R/W  
0
0
Reserved  
This Bit Is Not Used  
126  
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