XRT86L30
REV. 1.0.1
SINGLE T1/E1/J1 FRAMER/LIU COMBO
TABLE 144: MICROPROCESSOR
REGISTER #557 BIT DESCRIPTION
R
EGISTER ADDRESS
R
EGISTER
YPE
R
VALUE
ESET
C
HANNEL_0
T
0X0F01H
F
UNCTION
B
IT
#
NAME
D1
JABW_n
Jitter Attenuator Bandwidth Select: In E1 mode, set this bit
to “1” to select a 1.5Hz Bandwidth for the Jitter Attenuator. The
FIFO length will be automatically set to 64 bits. Set this bit to
“0” to select 10Hz Bandwidth for the Jitter Attenuator in E1
mode. In T1 mode the Jitter Attenuator Bandwidth is perma-
nently set to 3Hz, and the state of this bit has no effect on the
Bandwidth.
R/W
0
JABW
bit D1
FIFOS_n
bit D0
JA B-W
Hz
FIFO
Size
Mode
T1
T1
T1
T1
E1
E1
E1
E1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
3
3
32
64
32
64
32
64
64
64
3
3
10
10
1.5
1.5
D0
FIFOS_n
FIFO Size Select: See table of bit D1 above for the function of
R/W
0
this bit.
122
EXAR [ EXAR CORPORATION ]
