XRT86L30
REV. 1.0.1
SINGLE T1/E1/J1 FRAMER/LIU COMBO
TABLE 149: MICROPROCESSOR
REGISTER #562 BIT DESCRIPTION
R
EGISTER ADDRESS
C
HANNEL_0
R
EGISTER
YPE
R
VALUE
ESET
0X
0F06
H
FUNCTION
T
Bit #
D7
NAME
Reserved
DMOIS_n
RO
0
0
D6
Driver Monitor Output Interrupt Status: This bit is set to a
RUR
“1” every time the DMO status has changed since last read.
NOTE: This bit is reset upon read.
D5
FLSIS_n
LCVIS_n
FIFO Limit Interrupt Status: This bit is set to a “1” every time
when FIFO Limit (Read/Write pointer with +/- 3 bits apart) sta-
tus has changed since last read.
RUR
0
NOTE: This bit is reset upon read.
D4
D3
Line Code Violation Interrupt Status: This bit is set to a “1”
every time when LCV status has changed since last read.
RUR
RUR
0
0
NOTE: This bit is reset upon read.
NLCDIS_n Network Loop-Code Detection Interrupt Status: This bit is
set to a “1” every time when NLCD status has changed since
last read.
NOTE: This bit is reset upon read.
D2
D1
D0
AISDIS_n
AIS Detection Interrupt Status: This bit is set to a “1” every
time when AISD status has changed since last read.
RUR
RUR
RUR
0
0
0
NOTE: This bit is reset upon read.
RLOSIS_n Receive Loss of Signal Interrupt Status: This bit is set to a
“1” every time RLOS status has changed since last read.
NOTE: This bit is reset upon read.
QRPDIS_n Quasi-Random Pattern Detection Interrupt Status: This bit
is set to a “1” every time when QRPD status has changed
since last read.
NOTE: This bit is reset upon read.
TABLE 150: MICROPROCESSOR
REGISTER #563 BIT DESCRIPTION
R
EGISTER
A
DDRESS
C
HANNEL_0
R
EGISTER
R
VALUE
ESET
0X0F07H
FUNCTION
TYPE
Bit #
D7
NAME
Reserved
Reserved
CLOS5_n
RO
RO
RO
0
0
0
D6
D5
Cable Loss bit 5: CLOS[5:0]_n are the six bit receive selec-
tive equalizer setting which is also a binary word that repre-
sents the cable attenuation indication within ±1dB. CLOS5_n
is the most significant bit (MSB) and CLOS0_n is the least sig-
nificant bit (LSB).
D4
D3
CLOS4_n
CLOS3_n
Cable Loss bit 4: See description of D5 for function of this bit.
Cable Loss bit 3: See description of D5 for function of this bit.
RO
RO
0
0
130