XRT86L30
REV. 1.0.1
SINGLE T1/E1/J1 FRAMER/LIU COMBO
TABLE 145: MICROPROCESSOR
REGISTER #558 BIT DESCRIPTION
R
EGISTER ADDRESS
C
HANNEL_0
R
EGISTER
YPE
R
VALUE
ESET
0X0F02H
F
UNCTION
T
B
IT
#
NAME
D7
INVQRSS_n Invert QRSS Pattern: When TQRSS is active, Writing a “1” to
this bit inverts the polarity of transmitted QRSS pattern. Writing
a “0” sends the QRSS pattern with no inversion.
R/W
R/W
0
0
D6
TXTEST2_n Transmit Test Pattern bit 2: This bit together with TXTEST1
and TXTEST0 are used to generate and transmit test patterns
according to the following table:
TXTEST2 TXTEST1 TXTEST0 Test Pattern
0
1
1
1
1
X
0
0
1
1
X
0
1
0
1
No Pattern
TDQRSS
TAOS
TLUC
TLDC
TDQRSS (Transmit/Detect Quasi-Random Signal): This
condition when activated enables Quasi-Random Signal
Source generation and detection for the selected channel num-
20
ber n. In a T1 system QRSS pattern is a 2 -1 pseudo-random
bit sequence (PRBS) with no more than 14 consecutive zeros.
15
In a E1 system, QRSS is a 2 -1 PRBS pattern.
TAOS (Transmit All Ones): Activating this condition enables
the transmission of an All Ones Pattern from the selected
channel number n.
TLUC (Transmit Network Loop-Up Code): Activating this
condition enables the Network Loop-Up Code of “00001” to be
transmitted to the line for the selected channel number n.
When Network Loop-Up code is being transmitted, the
XRT86L30 will ignore the Automatic Loop-Code detection and
Remote Loop-Back activation (NLCDE1 =“1”, NLCDE0 =“1”, if
activated) in order to avoid activating Remote Digital Loop-
Back automatically when the remote terminal responds to the
Loop-Back request.
TLDC (Transmit Network Loop-Down Code): Activating this
condition enables the network Loop-Down Code of “001” to be
transmitted to the line for the selected channel number n.
D5
D4
D3
TXTEST1_n Transmit Test pattern bit 1: See description of bit D6 for the
R/W
R/W
R/W
0
0
0
function of this bit.
TXTEST0_n Transmit Test Pattern bit 0: See description of bit D6 for the
function of this bit.
TXON_n
Transmitter ON: Writing a “1” into this bit location turns on the
Transmit Section of channel n. Writing a “0” shuts off the Trans-
mit Section of channel n. In this mode, TTIP_n and TRING_n
driver outputs will be tri-stated for power reduction or redun-
dancy applications.
124