Reset Capture functionality is defined immediately following the deassertion of the
hardware or software reset. The GPIO pins are latched on the deassertion of reset and the
subsequent latched state is used for the secondary (Reset Capture) functionality. The GPIO
may then be claimed for a Primary Use function following reset. The GPIO interface signals
are all referenced to supply voltage VDDE.
.
Table 6-22. General Purpose I/O Pins
Signal Name
I/O
Primary Use
Reset Capture
Reset Capture Function
Type
dpu_gpio[7]
dpu_gpio[6]
dpu_gpio[5]
dpu_gpio[4]
dpu_gpio[3]
dpu_gpio[2]
I/O
I/O
I/O
I/O
I/O
I/O
DPU Status
Not Available
Not Available
ddr_config_2
ddr_config_1
ddr_config_0
Not Available
MDIO/SDA
Not Available
MDC/SCL
1=enable ODT, 0=no ODT
ddr_config_1
Net0 TX_DISABLE
Net1 TX_DISABLE
Net0 RX_LOSS
ddr_config_0
RGMII/RTBI
Voltage Level
1=1.5V HSTL, 0=2.5V LVCMOS
dpu_gpio[1]
dpu_gpio[0]
esc_gpio[7]
esc_gpio[6]
esc_gpio[5]
esc_gpio[4]
esc_gpio[3]
esc_gpio[2]
esc_gpio[1]
esc_gpio[0]
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Net1 RX_LOSS
unassigned
boot_config_1
boot_config_0
Not Available
Device_ID[2]
Device_ID[1]
Device_ID[0}
RMII MAC/PHY
100M/1G Boot
unassigned
1=Flash, 0=No Flash
1= Secure Boot, 0=Normal Boot
Not Available
eSC Status
PHY Interrupt
unassigned
Device_ID[2]
Device_ID[1]
eSC_Flash_CS1
eSC_Flash_SO
eSC_Flash_SI
eSC_Flash_CLK
eSC_Flash_CS0
Device_ID[0}
1=PHY, 0=MAC
1= 100M boot, 0= 1G boot
unassigned
Not Available
Not Available
Boot Configuration
During the boot process, the DPU reads the dpu_gpio[1]/boot_config_1 and
dpu_gpio[0]/boot_config_0 pins to determine how the boot process will occur. A resistor
should be used to pull the boot_config_0 and boot_config_1 pins high or low during the
boot phase. Using a resistor rather than directly tying this pin allows allows dpu_gpio[1]
and dpu_gpio[0] to be used as general purpose I/O for other user defined function during
normal operation after the boot process completes.
boot_config_1 - Flash Indicator. If asserted high indicates the presence of a Flash device
connected to esc_gpio[4:0].
boot_config_0 - Secure Boot Mode. If asserted low allows booting from a Flash, the Host
0 GMAC Interface, or the RMII Control Interface. If asserted high, the 4450 will boot from
either a Flash or the RMII Control Interface.
Status Indicators (Optional)
4450 – Data Sheet, DS-0131-06
Page58
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