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EMD3D256M08G1-150CBS1 参数 Datasheet PDF下载

EMD3D256M08G1-150CBS1图片预览
型号: EMD3D256M08G1-150CBS1
PDF下载: 下载PDF文件 查看货源
内容描述: [256Mb ST-DDR3 Spin-transfer Torque MRAM]
分类和应用: 双倍数据速率
文件页数/大小: 38 页 / 2405 K
品牌: EVERSPIN [ Everspin Technologies ]
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EMD3D256M08BS1  
EMD3D256M16BS1  
Command Truth Table (Continued)  
CKE  
BA  
[2:0]  
A13- A12/ A10/ A0-A9,  
Notes  
Symbol  
CS  
RAS  
CAS  
WE  
Function  
A15  
BC  
AP  
A11  
Prev.  
Next  
READ with Auto Precharge  
(Fixed BL8 or BC4)  
RDAP  
H
H
L
H
L
H
BA RFU  
BA RFU  
BA RFU  
V
H
V, CA  
7
7
READ with Auto Precharge  
(BC4, on the Fly)  
RDAPS4  
H
H
L
H
L
H
L
H
V, CA  
READ (BL8, on the Fly)  
No Operation  
RDAPS8  
NOP  
H
H
H
H
H
H
L
L
H
H
L
H
H
H
V
X
H
V
X
V, CA  
7
8
9
H
V
X
V
X
V
X
Device Deselected  
DES  
H
L
X
H
V
H
V
X
H
V
H
V
X
H
V
H
V
Power Down Entry  
PDE  
PDX  
H
L
L
V
V
V
V
V
V
V
V
V
V
H
L
Power Down Exit  
H
6
H
ZQ Calibration Long  
ZQCL  
ZQCS  
H
H
H
H
L
L
H
H
H
H
L
L
X
X
X
X
X
X
H
L
X
X
10  
ZQ Calibration Short  
Notes:  
1. Commands are defined by states of CS, RAS, CAS, WE, and CKE at the rising edge of the clock. The MSB of BA, RA, and CA  
are device-, density-, and configuration-dependent.  
2. RESET is LOW enabled and used only for asynchronous reset. Thus, RESET must be held HIGH during any normal opera-  
tion.  
3. The state of ODT does not affect the states described in this table.  
4. Operations apply to the bank defined by the bank address, BA[2:0]. For MRS, BA selects one of four mode registers.  
5. “V” means “H” or “L(a defined logic level), and “X” means “Don’t Care.”  
6. See the CKE Truth Table below for additional information on CKE transition.  
7. Burst READ’s or WRITE’s cannot be terminated or interrupted. MRS (fixed) and OTF BL/BC are defined in MR0.  
8. The purpose of the NOP command is to prevent the MRAM from registering any unwanted commands. A NOP will not termi-  
nate an operation that is executing.  
9. The DES and NOP commands perform similarly.  
10. ZQ CALIBRATION LONG is used for either ZQinit (first ZQCL command during initialization) or ZQoper (ZQCL command  
after initialization).  
EMD3D256M08BS1/16BS1 Revision 1.3 10/2018  
Copyright © 2018 Everspin Technologies  
22  
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