EMD3D256M08BS1
EMD3D256M16BS1
Table 10 – IDD Maximum Limits
2
1333MT/sec/pin
1
IDD
Units
x8
x16
220
220
55
220
220
55
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
IDD0
IDD1
IDD2P0 (slow)
IDD2P1(fast)
IDD2Q
60
60
90
90
90
90
IDD2N
90
90
IDD2NT
IDD3P
60
60
90
90
IDD3N
135
165
90
135
185
90
IDD4R
IDD4W
IDD5B
45
45
IDD6
2
490
45
667
45
IDD7
IDD8
Notes:
1. Refer to JESD79-3F Section 10, IDD and IDDQ Specification Parameters and Test Conditions, with some patterns that are STT-
MRAM specific.
2
t
t
t
2. In order to limit power dissipation, IDD7 is specified with FAW = 190ns for the x8 and FAW = 230ns for the x16. The FAW can
be reduced per Table 11 but IDD7 will increase.
EMD3D256M08BS1/16BS1 Revision 1.3 10/2018
Copyright © 2018 Everspin Technologies
19
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