ESMT
M14D5121632A (2H)
Operation Temperature Condition (TC) -40°C~95°C
tCL (abs) is the minimum of the actual instantaneous clock LOW time;
7. tQHS accounts for:
a. The pulse duration distortion of on-chip clock circuits, which represents how well the actual tHP at the input is
transferred to the output; and
b. The worst case push-out of DQS on one transition followed by the worst case pull-in of DQ on the next transition, both
of which are independent of each other, due to data pin skew, output pattern effects, and p-channel to n-channel
variation of the output drivers.
8. tQH = tHP - tQHS, where:
tHP is the minimum of the absolute half period of the actual input clock; and tQHS is the specification value under the max
column. {The less half-pulse width distortion present, the larger the tQH value is; and the larger the valid data eye will be.}
Examples:
a. If the system provides tHP of 1315 ps into a DDR2-667 SDRAM, the DRAM provides tQH of 975 ps minimum.
b. If the system provides tHP of 1420 ps into a DDR2-667 SDRAM, the DRAM provides tQH of 1080 ps minimum.
9. RU stands for round up. WR refers to the tWR parameter stored in the MRS.
10. When the device is operated with input clock jitter, this parameter needs to be de-rated by the actual tERR (6-10per) of the
input clock. (output de-ratings are relative to the SDRAM input clock.)
For example, if the measured jitter into a DDR2-667 SDRAM has tERR (6-10per)(min.) = - 272 ps and tERR (6-10per)(max.) =
+ 293 ps, then tDQSCK (min.)(derated) = tDQSCK (min.) - tERR (6-10per)(max.) = - 400 ps - 293 ps = - 693 ps and tDQSCK (max.)
(derated) = tDQSCK (max.) - tERR (6-10per)(min.) = 400 ps + 272 ps = + 672 ps. Similarly, tLZ (DQ) for DDR2-667 de-rates to tLZ
(DQ)(min.)(derated) = - 900 ps - 293 ps = - 1193 ps and tLZ (DQ)(max.)(derated) = 450 ps + 272 ps = + 722 ps.
11. When the device is operated with input clock jitter, this parameter needs to be de-rated by the actual tJIT (per) of the input
clock. (output de-ratings are relative to the SDRAM input clock.)
For example, if the measured jitter into a DDR2-667 SDRAM has tJIT (per)(min.) = - 72 ps and tJIT (per)(max.) = + 93 ps, then
tRPRE (min.)(derated) = tRPRE (min.) + tJIT (per)(min.) = 0.9 x tCK (avg) - 72 ps = + 2178 ps and tRPRE (max.)(derated) = tRPRE
(max.) + tJIT (per)(max.) = 1.1 x tCK (avg) + 93 ps = + 2843 ps.
12. When the device is operated with input clock jitter, this parameter needs to be de-rated by the actual tJIT (duty) of the input
clock. (output de-ratings are relative to the SDRAM input clock.)
For example, if the measured jitter into a DDR2-667 SDRAM has tJIT (duty)(min.) = - 72 ps and tJIT (duty)(max.) = + 93 ps,
then tRPST (min.)(derated) = tRPST (min.) + tJIT (duty)(min.) = 0.4 x tCK (avg) - 72 ps = + 928 ps and tRPST (max.)(derated) =
t
RPST (max.) + tJIT (duty)(max.) = 0.6 x tCK (avg) + 93 ps = + 1592 ps.
13. Refer to the Clock Jitter table.
14. ODT turn on time min is when the device leaves high impedance and ODT resistance begins to turn on.
ODT turn on time max is when the ODT resistance is fully on. Both are measured from tAOND
.
15. ODT turn off time min is when the device starts to turn off ODT resistance.
ODT turn off time max is when the bus is in high impedance. Both are measured from tAOFD
.
16. When the device is operated with input clock jitter, this parameter needs to be de-rated by the actual tERR (6-10per) of the
input clock. (output de-ratings are relative to the SDRAM input clock.)
17. When the device is operated with input clock jitter, this parameter needs to be derated by { - tJIT (duty)(max.) - tERR
(6-10per)(max.) } and { - tJIT (duty)(min.) - tERR (6-10per)(min.) } of the actual input clock. (output deratings are relative to the
SDRAM input clock.)
For example, if the measured jitter into a DDR2-667 SDRAM has tERR (6-10per)(min.) = - 272 ps, tERR (6- 10per)(max.) = +
293 ps, tJIT (duty)(min.) = - 106 ps and tJIT (duty)(max.) = + 94 ps, then tAOF(min.)(derated) = tAOF(min.) + { - tJIT (duty)(max.) -
tERR (6-10per)(max.) } = - 450 ps + { - 94 ps - 293 ps} = - 837 ps and tAOF(max.)(derated) = tAOF(max.) + { - tJIT (duty)(min.) -
t
ERR (6-10per)(min.) } = 1050 ps + { 106 ps + 272 ps } = + 1428 ps.
18. For tAOFD of DDR2-667/800/1066, the 1/2 clock of tCK in the 2.5 x tCK assumes a tCH (avg), average input clock HIGH pulse
width of 0.5 relative to tCK (avg). tAOF (min.) and tAOF (max.) should each be derated by the same amount as the actual
amount of tCH (avg) offset present at the DRAM input with respect to 0.5.
For example, if an input clock has a worst case tCH (avg) of 0.48, the tAOF (min.) should be derated by subtracting 0.02 x tCK
(avg) from it, whereas if an input clock has a worst case tCH (avg) of 0.52, the tAOF (max.) should be derated by adding 0.02 x
tCK (avg) to it. Therefore, we have;
t
AOF (min.)(derated) = tAC (min.) - [0.5 - Min(0.5, tCH (avg)(min.))] x tCK (avg)
tAOF (max.)(derated) = tAC (max.) + 0.6 + [Max(0.5, tCH (avg)(max.)) - 0.5] x tCK (avg) or
AOF (min.)(derated) = Min(tAC (min.), tAC (min.) - [0.5 - tCH (avg)(min.)] x tCK (avg))
tAOF (max.)(derated) = 0.6 + Max(tAC (max.), tAC (max.) + [tCH (avg)(max.) - 0.5] x tCK (avg)), where:
CH (avg)(min.) and tCH (avg)(max.) are the minimum and maximum of tCH (avg) actually measured at the DRAM input balls.
t
t
Elite Semiconductor Memory Technology Inc.
Publication Date : Aug. 2011
Revision : 1.1 17/62
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
