Epson Research and Development
Page 95
Vancouver Design Center
11 CRT/TV Considerations
The S1D13506 is capable of driving an LCD panel, CRT display, or a TV monitor.
However, only an LCD panel and CRT or an LCD panel and TV can be driven simulta-
neously. It is not possible to drive both a CRT and TV at the same time.
The horizontal and vertical timing requirements of LCD panels allows for a wide timing
variance. In comparison, a CRT display has very strict timing requirements with even a
very small timing variance degrading the displayed image. TV monitors require timings
based on the NTSC or PAL specifications.
The utility 13506CFG.EXE can be used to generate a header file containing the register
values required for CRT/TV or LCD panel timings. For further information on
13506CFG.EXE, see the 13506CFG Users Manual, document number X25B-B-001-xx.
11.1 CRT Considerations
CRT timings are based on the VESA Monitor Timing Specifications. The VESA specifi-
cation details all the parameters of the display and non-display times, as well as the input
clock required to meet the times. Failing to use correct timings can result in an unsyn-
chronized image on a particular monitor, which can permanently damage the
monitor. Virtually all VGA monitors sync if VESA timings are used.
For more information on VESA timings, contact the Video Electronics Standards Associ-
ation on the internet at www.vesa.org.
11.1.1 Generating CRT timings with 13506CFG
13506CFG.EXE will generate correct VESA timings for 640x480 and 800x600 if provided
the correct VESA input clock. The following timings can be generated:
• 640x480 @ 60Hz (Input Clock = 25.175 MHz)
• 640x480 @ 72Hz (Input Clock = 31.500 MHz)
• 640x480 @ 75Hz (Input Clock = 31.500 MHz)
• 640x480 @ 85 Hz (Input Clock = 36.000 MHz)
• 800x600 @ 56 Hz (Input Clock = 36.000 MHz)
• 800x600 @ 60 Hz (Input Clock = 40.000 MHz)
11.1.2 DAC Output Level Selection
When the CRT is active, the DAC Output Level Select bit (REG[05Bh] bit 3) can be used
to double values outpu to the DAC. This would normally result in very bright colors on the
display, but if IREF is reduced at the same time the display will remain at its intended
brightness and power consumption is reduced.
Programming Notes and Examples
Issue Date: 01/02/06
S1D13506
X25B-G-003-03
EPSON [ EPSON COMPANY ]
