Epson Research and Development
Page 99
Vancouver Design Center
12 MediaPlug
The S1D13506 is designed with support for MediaPlug. MediaPlug is a digital interface
supporting the Winnov Videum camera. The Videum camera supports simultaneous video
and audio capture of streaming (real-time) and still images. It also supports streaming live
video at speeds near 30 frames per second on fast host systems (i.e. Pentium-2 300MHz or
faster).
12.1 Programming
MediaPlug and the Winnov Videum camera are a proprietary design of Winnov. Due to the
complexity of the digital interface, all software and drivers for the camera are provided by
Winnov. Customers intending to use the MediaPlug interface in their design should contact
Epson Electronics America to obtain the latest S1D13506 MediaPlug drivers for testing
purposes.
The MediaPlug interface on the S1D13506 must be enabled to function correctly. To enable
the MediaPlug interface, MD13 and MD14 must be high (1) on the rising edge of RESET#.
When the MediaPlug interface is enabled, GPIO2 is controlled by the MediaPlug LCMD
register, and the GPIO2 bits in both REG[004h] and REG[008h] have no effect. Also
when the MediaPlug interface is enabled, the camera power (VMPEPWR) is controlled by
MA11/GPIO2 pin.
The MediaPlug LCMD 16-bit register REG[1000h] contains status bits which can be read
by software. For further information on these status bits, see the S1D13506 Hardware
Functional Specification, document number X25B-A-001-xx.
The MediaPlug IC Revision bits (REG[1000h] bits 11-8) contain the revision of the
interface. The 16-bit value read from REG[1000h] should be masked with 0F00h and
compared with 0300h (the current revision of the interface).
The MediaPlug Cable Detected Status bit (REG[1000h] bit 7) determines if a camera is
connected to the MediaPlug interface. When this bit returns a 0, a camera is connected.
When this bit returns a 1, a camera is not connected.
The MediaPlug Power Enable to Remote bit (REG[1000h], bit 1) controls the power to the
remote camera. GPIO2 is controlled by this bit when the MediaPlug interface is enabled.
Therefore, this bit must be used instead of the GPIO2 control bits in REG[004h] and
REG[008h] when programming the external ICD2061A clock chip used on the
S5U13506B00x evaluation boards. Writing this bit is necessary only when software needs
to control the MA11/GPIO2 pin.
Programming Notes and Examples
Issue Date: 01/02/06
S1D13506
X25B-G-003-03
EPSON [ EPSON COMPANY ]
