Epson Research and Development
Page 163
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BitBlt Control Register 1
REG[101h]
RW
BitBlt Color
Format Select
n/a
n/a
n/a
Reserved
n/a
n/a
n/a
bit 4
bit 0
Reserved.
Must be set to 0.
BitBlt Color Format Select
This bit selects the color format that the 2D operation is applied to.
When this bit = 0, 8 bpp (256 color) format is selected.
When this bit = 1, 16 bpp (64K color) format is selected.
BitBlt ROP Code/Color Expansion Register
REG[102h]
RW
BitBlt ROP
Code
BitBlt ROP
Code
BitBlt ROP
Code
BitBlt ROP
Code
n/a
n/a
n/a
n/a
Bit 3
Bit 2
Bit 1
Bit 0
bits 3-0
BitBlt Raster Operation Code/Color Expansion Bits [3:0]
ROP Code for Write Blit and Move Blit. Bits 2-0 also specify the start bit position for
Color Expansion.
Table 8-31: BitBlt ROP Code/Color Expansion Function Selection
Boolean Function for Write
Blit and Move Blit
Boolean Function for
Pattern Fill
Start Bit Position for Color
Expansion
BitBlt ROP Code Bits [3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
0 (Blackness)
0 (Blackness)
bit 0
bit 1
bit 2
bit 3
bit 4
bit 5
bit 6
bit 7
bit 0
bit 1
bit 2
bit 3
bit 4
bit 5
bit 6
bit 7
~S . ~D or ~(S + D)
~P . ~D or ~(P + D)
~S . D
~P . D
~S
~P
S . ~D
P . ~D
~D
~D
S ^ D
P ^ D
~S + ~D or ~(S . D)
~P + ~D or ~(P . D)
S . D
P . D
~(S ^ D)
D
~(P ^ D)
D
~S + D
S
~P + D
P
S + ~D
S + D
1 (Whiteness)
P + ~D
P + D
1 (Whiteness)
Note
S = Source, D = Destination, P = Pattern.
Hardware Functional Specification
Issue Date: 01/02/06
S1D13506
X25B-A-001-10
EPSON [ EPSON COMPANY ]
