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S1D13506 参数 Datasheet PDF下载

S1D13506图片预览
型号: S1D13506
PDF下载: 下载PDF文件 查看货源
内容描述: S1D13506彩色LCD / CRT / TV控制器 [S1D13506 Color LCD/CRT/TV Controller]
分类和应用: 电视控制器
文件页数/大小: 696 页 / 5934 K
品牌: EPSON [ EPSON COMPANY ]
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Page 142  
Epson Research and Development  
Vancouver Design Center  
LCD Miscellaneous Register  
REG[041h]  
RW  
Dithering  
Disable  
Dual Panel  
Buffer Disable  
n/a  
n/a  
n/a  
n/a  
n/a  
n/a  
bit 1  
Dithering Disable  
When this bit = 1, dithering on the passive LCD panel for 15/16 bpp mode is disabled  
12  
allowing a maximum of 4096 colors (2 ) or 16 gray shades.  
When this bit = 0, dithering on the passive LCD panel for 15/16 bpp mode is enabled  
16  
allowing a maximum of 64K colors (2 ) or 64 gray shades.  
Note  
This bit has no effect in 4/8 bpp modes where dithering is not supported.  
All passive STN color panels are controlled using 3 bits for each pixel (RGB) for a total of  
8 possible colors. LCD controllers use a combination of Frame Rate Modulation (FRM)  
and dithering to achieve more than 8 colors per pixel. FRM can achieve 16 shades of color  
for each RGB component resulting in a total of 4096 possible colors (16x16x16). Dithering  
uses a 4 pixel square formation and applies a set of 4 hard-coded patterns for each of the 16  
shades of color. This expands the original 16 shades of color from the FRM logic to 64  
shades per RGB component which results in 256K colors per pixel (64x64x64).  
For the S1D13506, 16 bpp is arranged as 5-6-5 RGB. In this mode, when dithering is  
enabled, the LUT is bypassed and the original 16-bit data is used as a pointer into the 64  
shades per color in the following manner.  
(5-6-5 RGB) 32 possible Red, 64 possible Green, 32 possible Blue  
This combination of FRM and dithering results in 256K colors/pixel, however, the 16 bpp  
limitation of the S1D13506 limits this to 64K colors/pixel.  
bit 0  
Dual Panel Buffer Disable  
This bit is used to disable the Dual Panel Buffer.  
When this bit = 1, the Dual Panel Buffer is disabled.  
When this bit = 0, the Dual Panel Buffer is enabled.  
When a single panel is selected, the Dual Panel Buffer is automatically disabled and this  
bit has no effect.  
The Dual Panel Buffer is needed to fully support dual panels. Disabling the Dual Panel  
Buffer will improve performance, reduce power consumption, and allow higher resolu-  
tion/ color display modes than would otherwise be possible; however, disabling the Dual  
Panel Buffer will reduce image contrast and overall display quality. This mode is not nor-  
mally used except in special circumstances such as simultaneous display ona CRT/TV  
and dual panel LCD. For details on Frame Rate Calculation, see Section 17.  
S1D13506  
X25B-A-001-10  
Hardware Functional Specification  
Issue Date: 01/02/06  
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