EM78P417N/418N/419N
8-Bit Microprocessor with OTP ROM
NOTE
Tcc timeout period [1/Fosc x prescaler x 256 (Tcc cnt) x 1 (CLK=2)]
Tcc timeout period [1/Fosc x prescaler x 256 (Tcc cnt) x 2 (CLK=4)]
6.2.3 IOC50 ~ IOC70 (I/O Port Control Register)
"1" puts the relative I/O pin into high impedance, while "0" defines the relative I/O pin as
output.
IOC50, IOC60, and IOC70 registers are all readable and writable.
NOTE
Using EM78P417N and EM78P418N type bit9 of the code option register (word0) must
set to “1”.Using EM78P417N type must set extra bit7 of IOC50 and bit0 of IOC70 to
“0”.Then pin status set to “0”.Following the rules will have no addition power
consumption.
6.2.4 IOC80 (PWMCON: PWM Control Register)
7
6
5
4
3
2
1
0
PWM3E
PWM2E
PWM1E
“0”
T1EN
T1P2
T1P1
T1P0
Bit 7 (PWM3E): PWM3 enable bit
0 = PWM3 is off (default value), and its related pin carries out the P53
function.
1 = PWM3 is on, and its related pin is automatically set to output.
NOTE
The P53/PWM3/VREF pin cannot be applied to PWM3 and VREF at the same time. IF
P53/PWM3/VREF acts as VREF analog input pin, then PWM3E must be “0”..
The P53/PWM3/VREF pin priority is as follows:
P53/PWM3/VREF PIN PRIORITY
High
Medium
PWM3
Low
P53
VREF
Bit 6 (PWM2E): PWM2 enable bit
0 = PWM2 is off (default value), and its related pin carries out the P52
function.
1 = PWM2 is on, and its related pin is automatically set to output.
Product Specification (V1.0) 06.23.2005
• 19
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
