EM78P417N/418N/419N
8-Bit Microprocessor with OTP ROM
[With Simulator (C3~C0)]: are IRC calibration bits in IRC oscillator mode. Under
IRC oscillator mode of ICE418N simulator, these are the IRC
calibration bits of IRC oscillator mode.
C3
C2
C1
C0
Frequency (MHz)
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
0
0
1
1
1
1
0
0
1
1
0
0
0
1
0
1
0
1
0
1
1
0
1
0
1
0
1
0
(1-36%) x F
(1-31.5%) x F
(1-27%) x F
(1-22.5%) x F
(1-18%) x F
(1-13.5%) x F
(1-9%) x F
(1-4.5%) x F
F (default)
(1+4.5%) x F
(1+9%) x F
(1+135%) x F
(1+18%) x F
(1+22.5%) x F
(1+27%) x F
(1+31.5%) x F
1. Frequency values shown are theoretical and taken from an instance of a
high frequency mode. Hence are shown for reference only. Definite
values will depend on the actual process.
2. Similar way of calculation is also applicable to low frequency mode.
Bit 3 (ADWE): ADC wake-up enable bit
0 = Disable ADC wake-up
1 = Enable ADC wake-up
When the ADC Complete is used to enter interrupt vector or to
wake-up EM78P417/8/9N from sleep with AD conversion running, the
ADWE bit must be set to “Enable“.
Bit 2 (CMPWE): Comparator wake-up enable bit
0 = Disable Comparator wake-up
1 = Enable Comparator wake-up
When the Comparator output status change is used to enter interrupt
vector or to wake-up EM78P418/9N from sleep, the CMPWE bit must
be set to “Enable“.
Bit 1 (ICWE): Port 6 input change to wake-up status enable bit
0 = Disable Port 6 input change to wake-up status
1 = Enable Port 6 input change wake-up status
When the Port 6 Input Status Change is used to enter interrupt vector
or to wake-up EM78P417/8/9N from sleep, the ICWE bit must be set
to “Enable“.
Bit 0:
Not implemented, read as ‘0’
16 •
Product Specification (V1.0) 06.23.2005
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
