EM78P417N/418N/419N
8-Bit Microprocessor with OTP ROM
Bit 2 ~ Bit 0:
Unimplemented, read as ‘0’
6.1.10 RB (ADDATA: Converted Value of ADC)
7
6
5
4
3
2
1
0
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
When the AD conversion is completed, the result is loaded into the ADDATA. The
ADRUN bit is cleared, and the ADIF (see Section 6.1.14) is set.
RB is read only.
6.1.11 RC (ADDATA1H: Converted Value of ADC )
7
6
5
4
3
2
1
0
“0”
“0”
“0”
“0”
AD11
AD10
AD9
AD8
When the AD conversion is completed, the result is loaded into the ADDATA1H. The
ADRUN bit is cleared, and the ADIF (see Section 6.1.14) is set.
RC is read only.
6.1.12 RD (ADDATA1L: Converted Value of ADC )
7
6
5
4
3
2
1
0
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
When the AD conversion is completed, the result is loaded into the ADDATA1L. The
ADRUN bit is cleared, and the ADIF (see Section 6.1.14) is set.
RD is read only
6.1.13 RE (WUCR: Wake- Up Control Register)
7
6
5
4
3
2
1
0
EM78P417/8/9N
“0”
C3
“0”
C2
“0”
C1
“0”
C0
ADWE CMPWE ICWE
ADWE CMPWE ICWE
“0”
“0”
ICE418N Simulator
Bit 7 ~ Bit 4:
[With EM78P417/8/9N]: Unimplemented, read as ‘0’.
Product Specification (V1.0) 06.23.2005
• 15
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
