EM78P417N/418N/419N
8-Bit Microprocessor with OTP ROM
6.1.14 RF (Interrupt Status Register)
7
6
5
4
3
2
1
0
CMPIF
PWM3IF PWM2IF PWM1IF
ADIF
EXIF
ICIF
TCIF
NOTE
■ “1” means interrupt request; “0” means no interrupt occurs.
■ RF can be cleared by instruction but cannot be set.
■ IOCF0 is the interrupt mask register.
■ Reading RF will result to "logic AND" of RF and IOCF0.
Bit 7 (CMPIF):
Comparator interrupt flag. Set when a change occurs in the output
of Comparator. Reset by software.
Bit 6 (PWM3IF): PWM3 (Pulse Width Modulation) interrupt flag. Set when a selected
duration is reached. Reset by software.
Bit 5 (PWM2IF): PWM2 (Pulse Width Modulation) interrupt flag. Set when a selected
duration is reached. Reset by software.
Bit 4 (PWM1IF): PWM1 (Pulse Width Modulation) interrupt flag. Set when a selected
duration is reached. Reset by software.
Bit 3 (ADIF):
Bit 2 (EXIF):
Bit 1 (ICIF):
Bit 0 (TCIF):
Interrupt flag for analog to digital conversion. Set when AD
conversion is completed. Reset by software.
External interrupt flag. Set by falling edge on /INT pin. Reset by
software.
Port 6 input status change interrupt flag. Set when Port 6 input
changes. Reset by software.
TCC overflow interrupt flag. Set when TCC overflows. Reset by
software.
6.1.15 R10 ~ R3F
All of these are 8-bit general-purpose registers.
Product Specification (V1.0) 06.23.2005
• 17
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
