EM78P417N/418N/419N
8-Bit Microprocessor with OTP ROM
6.1.6 R5 ~ R7 (Port 5 ~ Port 7)
R5 & R6 are I/O registers.
R7
is I/O registers. The upper 3 bits of R7 are fixed to 0.
6.1.7 R8 (AISR: ADC Input Select Register)
The AISR register defines the pins of Port 6 as analog inputs or as digital I/O,
individually.
7
6
5
4
3
2
1
0
ADE7
ADE6
ADE5
ADE4
ADE3
ADE2
ADE1
ADE0
Bit 7 (ADE7 ): AD converter enable bit of P67 pin
0 = Disable ADC7, P67 acts as I/O pin
1 = Enable ADC7, acts as analog input pin
Bit 6 (ADE6 ): AD converter enable bit of P66 pin
0 = Disable ADC6, P66 acts as I/O pin
1 = Enable ADC6, acts as analog input pin
Bit 5 (ADE5 ): AD converter enable bit of P65 pin
0 = Disable ADC5, P65 acts as I/O pin
1 = Enable ADC5, acts as analog input pin
Bit 4 (ADE4 ): AD converter enable bit of P64 pin
0 = Disable ADC4, P64 acts as I/O pin
1 = Enable ADC4 acts as analog input pin
Bit 3 (ADE3 ): AD converter enable bit of P63 pin
0 = Disable ADC3, P63 acts as I/O pin
1 = Enable ADC3, acts as analog input pin
Bit 2 (ADE2 ): AD converter enable bit of P62 pin
0 = Disable ADC2, P62 acts as I/O pin
1 = Enable ADC2, acts as analog input pin
Bit 1 (ADE1 ): AD converter enable bit of P61 pin
0 = Disable ADC1, P61 acts as I/O pin
1 = Enable ADC1, acts as analog input pin
Bit 0 (ADE0 ): AD converter enable bit of P60 pin.
0 = Disable ADC0, P60 acts as I/O pin
1 = Enable ADC0, acts as analog input pin
12 •
Product Specification (V1.0) 06.23.2005
(This specification is subject to change without further notice)