EM78P350N
8-Bit Microprocessor with OTP ROM
SPI
SDI
SDO
Shift Clock
SPI Shift Buffer
FOSC
2 1 0
SPIC
7~0
SPIWB
1 0
T4CON
7 6 4
0
2
4
7~0
SPIRB
SPIC
INTC
SPIC SPIS
DATA BUS
Fig. 6-11 SPI Transmission Function Block Diagram
Below are the functions of each block and explanations on how to carry out the SPI
communication with the signals depicted in Fig.6-12 and Fig.6-13:
P82/Sin: Serial Data In
P81/Sout: Serial Data Out
P80/SCK: Serial Clock
P75//SS: /Slave Select (Option). This pin (/SS) may be required in slave mode.
RBF: Set by Buffer Full Detector, and read SPIRB to reset.
Buffer Full Detector: Sets to 1 when an 8-bit shifting is completed.
SSE: Loads the data in SPIS register, and begin to shift
SPIS reg.:Shifting byte in and out. The MSB is shifted first. Both the SPIS and the
SPIW registers are loaded at the same time. Once data are written, SPIS starts
transmission/reception. The data received will be moved to the SPIR register as
the shifting of the 8-bit data is completed. The RBF (Read Buffer Full) flag and the
SPIF (SPI Interrupt) flag are then set.
SPIR reg.:Read buffer. The buffer will be updated as the 8-bit shifting is
completed. The data must be read before the next reception is completed. The
RBF flag is cleared as the SPIR register reads.
SPIW reg.:Write buffer. The buffer will ignore any attempts to write until the 8-bit
shifting is completed.
40 •
Product Specification (V1.0) 09.14.2006
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
