EM78P350N
8-Bit Microprocessor with OTP ROM
PCRD
P
R
Q
D
CLK
PCWR
_
Q
C
L
P60 ~ P67
PORT
P
R
IOD
Q
D
CLK
_
Q
PDWR
C
L
M
U
X
0
1
PDRD
TI n
P
R
D
Q
CLK
_
Q
C
L
Note: Pull-high (down) and Open-drain are not shown in the figure.
Fig. 6-5 I/O Port and I/O Control Register Circuit for Port 6
IOCE.1
P
Q
D
R
CLK
Interrupt
_
Q
C
L
RE.1
ENI Instruction
P
R
T10
T11
D
Q
P
CLK
Q
D
R
_
Q
C
L
CLK
_
Q
C
L
T17
DISI Instruction
Interrupt
(Wake-up from SLEEP)
/SLEP
Next Instruction
(Wake-up from SLEEP)
Fig. 6-6 Port 6 Block Diagram with Input Change Interrupt/Wake-up
Product Specification (V1.0) 09.14.2006
36 •
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
