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EDD51323DBH-6ELS-F 参数 Datasheet PDF下载

EDD51323DBH-6ELS-F图片预览
型号: EDD51323DBH-6ELS-F
PDF下载: 下载PDF文件 查看货源
内容描述: 512M DDR位移动RAM ™ WTR (宽温度范围) ,低功耗功能 [512M bits DDR Mobile RAM™ WTR (Wide Temperature Range), Low Power Function]
分类和应用: 双倍数据速率
文件页数/大小: 60 页 / 761 K
品牌: ELPIDA [ ELPIDA MEMORY ]
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EDD51323DBH-LS  
Advanced Data Retention Current  
(TA = 25°C to +85°C, VDD and VDDQ = 1.7V to 1.95V, VSS and VSSQ = 0V)  
Parameter  
Symbol  
typ.  
max.  
Unit  
Condition  
Notes  
Advanced data retention current  
(Self-refresh current)  
PASR="000" (Full)  
25°C TJ +40°C  
CKE = L  
IDD6  
250  
µA  
PASR="001" (2BK)  
PASR="010" (1BK)  
PASR="000" (Full)  
PASR="001" (2BK)  
PASR="010" (1BK)  
PASR="000" (Full)  
PASR="001" (2BK)  
PASR="010" (1BK)  
220  
200  
420  
300  
230  
500  
350  
250  
µA  
µA  
µA  
µA  
µA  
µA  
µA  
µA  
IDD6  
IDD6  
+40°C < TJ +70°C  
CKE = L  
+70°C < TJ +85°C  
CKE = L  
Notes: 1. IDD specifications are tested after the device is properly initialized.  
2. Input slew rate is specified by Test Conditions.  
3. Definitions for IDD:  
L is defined as VIN 0.1 × VDDQ;  
H is defined as VIN 0.9 × VDDQ;  
STABLE is defined as inputs stable at an H or L level;  
SWITCHING is defined as:  
Address and command: inputs changing between H and L once per two clock cycles;  
Data bus inputs: DQ changing between H and L once per clock cycle; DM and DQS are STABLE.  
DC Characteristics 2 (TA = 25°C to +85°C, VDD and VDDQ = 1.7V to 1.95V, VSS and VSSQ = 0V)  
Parameter  
Symbol  
ILI  
min.  
max.  
2.0  
Unit  
µA  
Test condition  
Notes  
Input leakage current  
2.0  
0 VIN VDDQ  
0 VOUT VDDQ,  
DQ = disable  
Output leakage current  
ILO  
1.5  
1.5  
µA  
Output high voltage  
Output low voltage  
VOH  
VOL  
0.9 × VDDQ  
V
V
IOH = 0.1mA  
0.1 × VDDQ  
IOL = 0.1mA  
Pin Capacitance (TA = +25°C, VDD and VDDQ = 1.7V to 1.95V)  
Parameter  
Symbol  
CI1  
Pins  
min.  
2.0  
2.0  
typ.  
max.  
4.5  
Unit  
pF  
pF  
pF  
pF  
pF  
pF  
Notes  
Input capacitance  
CK, /CK  
1
CI2  
All other input-only pins  
CK, /CK  
4.5  
1
Delta input capacitance  
Cdi1  
Cdi2  
CI/O  
Cdio  
0.25  
1.0  
1
All other input-only pins  
DQ, DM, DQS  
DQ, DM, DQS  
1
Data input/output capacitance  
Delta input/output capacitance  
3.5  
6.0  
1, 2  
1
1.0  
Notes: 1. These parameters are measured on conditions: f = 100MHz, VOUT = VDDQ/2, VOUT = 0.2V,  
TA = +25°C.  
2. DOUT circuits are disabled.  
Preliminary Data Sheet E1432E20 (Ver. 2.0)  
7