DA14580
FINAL
Bluetooth Low Energy 4.2 SoC
Table 8: OTPC_STAT_REG (0x40008008)
Bit
Mode Symbol
Description
Reset
28:16
R
OTPC_STAT_NWOR
DS
OTPC_STAT_TERR_ Indicates the upper bank as the source of a test error. This
Contains the current value of the words to be processed.
0
15
14
13
R
0x0
U
value is valid when OTPC_STAT_TERROR is valid.
0 - There is no test error in the upper bank
1 - A test error has occured in the upper bank
R
R
OTPC_STAT_TERR_ Indicates the lower bank as the source of a test error. The
0x0
0x0
L
value is valid when OTPC_STAT_TERROR is valid.
0 - There is no test error in the lower bank
1 - A test error has occured in the lower bank
OTPC_STAT_PERR_ Indicates the upper bank as the source of a programming
U
error. The value is valid when OTPC_STAT_PERROR is
valid.
0 - There is no programming error in the upper bank
1 - A programming error has occured in the upper bank
12
R
R
OTPC_STAT_PERR_ Indicates the lower bank as the source of a programming
0x0
0x0
L
error. The value is valid when OTPC_STAT_PERROR is
valid.
0 - There is no programming error in the lower bank
1 - A programming error has occured in the lower bank
11:8
OTPC_STAT_FWOR
DS
Indicates the number of words which contained in the fifo of
the controller.
7:5
4
-
-
Reserved
0x0
0x1
R
OTPC_STAT_ARDY
Monitors the progress of read or programming operations
while in the AREAD or APROG modes.
0 - The controller is busy while reading or programming
(AREAD or APROG modes).
1 - The controller is not busy in AREAD or APROG mode.
3
R
OTPC_STAT_TERR
OR
Indicates the result of a test sequence. Should be checked
after the end of a TBLANK, TDEC and TWR mode
(OTPC_STAT_TRDY= 1).
0x0
0 - The test sequence ends with no error.
1 - The test sequence has failed.
2
1
R
R
OTPC_STAT_TRDY
Indicates the state of a test mode. Should be used to monitor
the progress of the TBLANK, TDEC and TWR modes.
0 - The controller is busy. A test mode is in progress.
1 - There is no active test mode.
0x1
0x0
OTPC_STAT_PERR
OR
Indicates that an error has occurred during the bit-program-
ming process.
0 - No error during the bit-programming process.
1 - The process of bit-programming failed.
When the controller is in MPROG mode, this bit should be
checked after the end of the programming process
(OTPC_STAT_PRDY= 1).
During APROG mode, the value of this field is normal to
change periodically. Upon finishing the operation in the
APROG mode (OTPC_STAT_ARDY= 1), this field indicates
if the programming has failed or ended succesfully.
0
R
OTPC_STAT_PRDY
Indicates the state of a bit-programming process.
0 - The controller is busy. A bit-programming is in progress
1 - The logic which performs bit-programming is idle.
When the controller is in MPROG mode, this bit should be
used to monitor the progress of a programming request.
During APROG mode, the value of this field it is normal to
changing periodically.
0x1
Datasheet
Revision 3.4
09-Nov-2016
CFR0011-120-01
27 of 155
© 2014 Dialog Semiconductor