DA14580
FINAL
Bluetooth Low Energy 4.2 SoC
Table 170: GPIO_IRQ4_IN_SEL_REG (0x50001408)
Bit
Mode Symbol
Description
Reset
15:5
5:0
-
-
Reserved
0x0
0x0
R/W
KBRD_IRQ4_SEL
see KBRD_IRQ0_SEL
Table 171: GPIO_DEBOUNCE_REG (0x5000140C)
Bit
Mode Symbol
Description
Reset
0x0
15:14
13
-
-
Reserved
R/W
DEB_ENABLE_KBR
D
enables the debounce counter for the KBRD interface
0x0
12
11
10
9
R/W
R/W
R/W
R/W
R/W
-
DEB_ENABLE4
DEB_ENABLE3
DEB_ENABLE2
DEB_ENABLE1
DEB_ENABLE0
-
enables the debounce counter for GPIO IRQ4
enables the debounce counter for GPIO IRQ3
enables the debounce counter for GPIO IRQ2
enables the debounce counter for GPIO IRQ1
enables the debounce counter for GPIO IRQ0
Reserved
0x0
0x0
0x0
0x0
0x0
0x0
0x0
8
7:6
5:0
R/W
DEB_VALUE
Keyboard debounce time if enabled. Generate KEYB_INT
after specified time.
Debounce time: N*1 ms. N =0..63
Table 172: GPIO_RESET_IRQ_REG (0x5000140E)
Bit
15:6
5
Mode Symbol
Description
Reset
0x0
-
-
Reserved
R0/W
RESET_KBRD_IRQ
writing a 1 to this bit will reset the KBRD IRQ.
Reading returns 0.
0x0
4
3
2
1
0
R0/W
R0/W
R0/W
R0/W
R0/W
RESET_GPIO4_IRQ
RESET_GPIO3_IRQ
RESET_GPIO2_IRQ
RESET_GPIO1_IRQ
RESET_GPIO0_IRQ
writing a 1 to this bit will reset the GPIO4 IRQ.
Reading returns 0.
0x0
0x0
0x0
0x0
0x0
writing a 1 to this bit will reset the GPIO3 IRQ.
Reading returns 0.
writing a 1 to this bit will reset the GPIO2 IRQ.
Reading returns 0.
writing a 1 to this bit will reset the GPIO1 IRQ.
Reading returns 0.
writing a 1 to this bit will reset the GPIO0 IRQ.
Reading returns 0.
Table 173: GPIO_INT_LEVEL_CTRL_REG (0x50001410)
Bit
15:14
12
11
Mode Symbol
Description
Reset
0x0
0x0
0x0
0x0
0x0
0x0
-
-
Reserved
R/W
R/W
R/W
R/W
R/W
EDGE_LEVELN4
EDGE_LEVELN3
EDGE_LEVELN2
EDGE_LEVELN1
EDGE_LEVELN0
see EDGE_LEVELn0, but for GPIO IRQ4
see EDGE_LEVELn0, but for GPIO IRQ3
see EDGE_LEVELn0, but for GPIO IRQ2
see EDGE_LEVELn0, but for GPIO IRQ1
10
9
8
0: do not wait for key release after interrupt was reset for
GPIO IRQ0, so a new interrupt can be initiated immediately
1: wait for key release after interrupt was reset for IRQ0
7:6
-
-
Reserved
0x0
Datasheet
Revision 3.4
09-Nov-2016
CFR0011-120-01
113 of 155
© 2014 Dialog Semiconductor
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