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DA14580-01PxAT2 参数 Datasheet PDF下载

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型号: DA14580-01PxAT2
PDF下载: 下载PDF文件 查看货源
内容描述: [Bluetooth Low Energy 4.2 SoC]
分类和应用:
文件页数/大小: 155 页 / 1209 K
品牌: DIALOG [ Dialog Semiconductor ]
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DA14580  
FINAL  
Bluetooth Low Energy 4.2 SoC  
Table 157: I2C_STATUS_REG (0x50001370)  
Bit  
Mode Symbol  
I2C_ACTIVITY  
Description  
Reset  
0
R
I2C Activity Status.  
0x0  
Table 158: I2C_TXFLR_REG (0x50001374)  
Bit  
Mode Symbol  
Description  
Reset  
0x0  
15:6  
5:0  
-
-
Reserved  
R
TXFLR  
Transmit FIFO Level. Contains the number of valid data  
entries in the transmit FIFO. Size is constrained by the  
TXFLR value  
0x0  
Table 159: I2C_RXFLR_REG (0x50001378)  
Bit  
Mode Symbol  
Description  
Reset  
0x0  
15:6  
5:0  
-
-
Reserved  
R
RXFLR  
Receive FIFO Level. Contains the number of valid data  
entries in the receive FIFO. Size is constrained by the  
RXFLR value  
0x0  
Table 160: I2C_SDA_HOLD_REG (0x5000137C)  
Bit  
Mode Symbol  
R/W IC_SDA_HOLD  
Description  
Reset  
15:0  
SDA Hold time  
0x1  
Table 161: I2C_TX_ABRT_SOURCE_REG (0x50001380)  
Bit  
Mode Symbol  
Description  
Reset  
15  
R
R
ABRT_SLVRD_INTX  
1: When the processor side responds to a slave mode  
request for data to be transmitted to a remote master and  
user writes a 1 in CMD (bit 8) of 2IC_DATA_CMD register  
0x0  
14  
ABRT_SLV_ARBLOS 1: Slave lost the bus while transmitting data to a remote  
0x0  
T
master.  
I2C_TX_ABRT_SOURCE[12] is set at the same time. Note:  
Even though the slave never "owns" the bus, something  
could go wrong on the bus. This is a fail safe check. For  
instance, during a data transmission at the low-to-high tran-  
sition of SCL, if what is on the data bus is not what is sup-  
posed to be transmitted, then the controller no longer own  
the bus.  
13  
12  
R
R
ABRT_SLVFLUSH_T  
XFIFO  
1: Slave has received a read command and some data  
exists in the TX FIFO so the slave issues a TX_ABRT inter-  
rupt to flush old data in TX FIFO.  
0x0  
0x0  
ARB_LOST  
1: Master has lost arbitration, or if  
I2C_TX_ABRT_SOURCE[14] is also set, then the slave  
transmitter has lost arbitration. Note: I2C can be both master  
and slave at the same time.  
11  
10  
R
R
ABRT_MASTER_DIS 1: User tries to initiate a Master operation with the Master  
mode disabled.  
0x0  
0x0  
ABRT_10B_RD_NO  
RSTRT  
1: The restart is disabled (IC_RESTART_EN bit  
(I2C_CON[5]) = 0) and the master sends a read command in  
10-bit addressing mode.  
Datasheet  
Revision 3.4  
09-Nov-2016  
CFR0011-120-01  
108 of 155  
© 2014 Dialog Semiconductor  
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