37
8Bit Single Chip Microcontroller
DMC73C168
IOCTL0
P0 >0100
0 = INTn Inactive
1 = INTn Pending
Read
INT3
INT1
INT3
INT1
INT2
INT2
ENABL
ENABL
FLAG
FLAG
ENABL
FLAG
O
O
O
O
O
O
O
O
Bit
7
6
5
4
3
2
1
0
Write
INT3
INT1
INT2
INT3
INT1
INT2
ENABL
ENABL
ENABL
CLEAR
CLEAR
CLEAR
Set to zero
0 = INTn disable
1 = INTn enable
0 = No effect
1 = Clear INTn flag
Figure 5-3A I/O Control Register 0 (IOCTL0)
IOCTL1
P1 >0101
0 = INTn Inactive
1 = INTn Pending
Read
INT4-1
FLAG
INT4-1
ENABL
INT4-0
ENABL
INT1
ENABL
INT4-0
FLAG
INT4-0
SENSE
INT3
SENSE
NOT
USED
O
O
O
O
X
O
O
O
Bit
7
6
5
4
3
2
1
0
Write
INT4-1
ENABL
INT4-1
CLEAR
INT4-0
ENABL
INT4-0
CLEAR
INT4-0
SENSE
INT3
SENSE
INT1
SENSE
X
0 = No effect
0 = INTn disable
1 = INTn enable
0 = INTn falling edge
sensitive
1 = Clear INTn flag
1 = INTn rising edge
sensitive
Figure 5-3B I/O Control Register 1 (IOCTL1)
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