40
8Bit Single Chip Microcontroller
DMC73C168
1) The port (A7/INT3, A6/INT4) used as the interrupt input should be input mode. The output
mode may cause to damage the device. If the content of the corresponding output port is
changed '1' to'0', the interrupt flag will also set to '1'.
2) If not used as the interrupt input, the corresponding Interrupt enable should be disabled,
but even if this interrupt Enable being disabled, the Interrupt Flag will be changed.
The External interrupt timing is shown in Figure 5-4B. And it needs an biditional circuitry when INT1,
INT3, INT4-0 are used as zero cross detector as shown in Figure 5-4C and the following conditions are
to be satisfied.
1) The External interrupt level should be range from VDD+0.3V to VSS, and it is necessary
for input current not to exceed the specification.
2) The noise on interrupt signal should be minimized because the noise debounce logic is not
implemented on chip. So the function may be failed due to the continuous interrupt.
VDD
External
VT+
Input Signal
VT-
VSS
1
Falling Edge
Interrupt
Last
Happen
Execution
0
Interrupt happen
Figure 5-4B External Interrupt Timing
VDD
DMC73C168
Resistor
INT1
Input
INT3
INT4-0
VSS
Figure 5-4C Additional Circuitry for External Input
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